39results about How to "Reduce output load" patented technology

A latency counter includes a counter circuit and a point-shift FIFO circuit. Latch circuits included in the point-shift FIFO circuit are divided into n groups having wired-OR outputs, and an output of a latch circuit that belongs to a group different from a current group is selected each time a count value is updated.

A solid-state image pickup device reduces the load of outputs from pixels and suppresses a decrease in gain, a reduction in a speed, and the like using a circuit for adding (averaging) a plurality of pixel signals. The device has a plurality of pixels which are one-dimensionally or two-dimensionally arranged and output photoelectrically converted signals, and a plurality of output lines to which the output signal(s) from one pixel or the pixels arranged on one column is / are outputted. A signal adder circuit for arbitrarily adding the output signals from the plurality of output lines and outputting an addition signal and a signal output circuit for outputting each of the output signals, as individual signals, from the plurality of output lines without adding them are independently provided.

A receiving circuit comprises a transimpedance amplifier 3 including an inversion amplifier 2 for amplifying an input current IN, and a feedback resistance R1 connected between an input and an output of the inversion amplifier 2, a comparison circuit 4 for comparing an output OUT of the transimpedance amplifier 3 with a certain desired reference value, and outputting a result of the comparison, and a control circuit for holding the comparison result, and generating an AGC signal 20 for adjusting a gain of the transimpedance amplifier 3. The transimpedance amplifier 20 has a function capable of gain adjustment in accordance with the input AGC signal 20. The control circuit 5 performs gain adjustment until the output OUT of the transimpedance amplifier 3 exceeds the reference value so that an appropriate gain is obtained. Therefore, even when an input has a wide dynamic range, it is possible to prevent signal saturation and a distortion in output waveform in the transimpedance amplifier, so that appropriate reception can be invariably performed and a signal having a stable duty can be output.

According to an aspect of the present disclosure, a gate driver includes a plurality of stages which is dependently connected to each other and each of the plurality of pixels includes: a first output unit which outputs a sensing signal by voltages of a Q node and a QB node; a second output unit which outputs a reference signal by the voltages of the Q node and the QB node; a third output unit which outputs a scan signal by the voltages of the Q node and the QB node; a first controller which controls the Q node; and a second controller which controls the QB node, and at least two of the first to third output units share at least one clock signal among a plurality of clock signals, thereby reducing an area of the gate driver.

The image display device includes: a plurality of pixels arranged in a matrix, each of which includes a driving transistor which converts a signal voltage which determines luminous intensity into a driving current; a luminescence element which generates photons according to the driving current flowing through it; and a threshold voltage detecting unit which detects a threshold voltage of the driving transistor while a reference voltage is applied. The pixels make up two or more driving blocks each of which includes a plurality of pixel rows. The image display device controls supply of the reference voltage and a power source voltage to all pixels in the same driving block with the same timing in a predetermined period and controls supply of the reference voltage and the power source voltage to all pixels in different blocks with different timings.

A driving circuit drives an electro-optical device in which a gray-scale level of each of a plurality of electro-optical elements provided so as to correspond to a plurality of data lines is controlled on the basis of a voltage of a corresponding data line. The driving circuit includes a pulse output circuit that outputs a plurality of sampling pulses, each of the plurality of sampling pulses becoming an active level sequentially; a plurality of unit circuits each of which is supplied with a sampling pulse from the pulse output circuit; and a signal line that is supplied with a gray-scale signal to sequentially designate a gray-scale level of each of the electro-optical elements. Each of the plurality of unit circuits has a first switching element that samples the gray-scale signal supplied to the signal line in accordance with a sampling pulse output from the pulse output circuit; a second switching element that is inserted between the first switching element and the data line and enters an off state until a predetermined period passes from a time when sampling operation is started by the first switching element; and a storage capacitor that holds a voltage of an output terminal of the second switching element.

The invention relates to a crystal oscillating circuit, which comprises an oscillating stage circuit, a direct current negative feedback circuit, and a push-pull amplifier circuit. The oscillating stage circuit generates an oscillator signal and outputs the oscillator signal to the direct current negative feedback circuit; the direct current negative feedback circuit performs amplitude control on the oscillator signal of the oscillating stage circuit and feeds back the oscillator signal to the oscillating stage circuit; the oscillating stage circuit outputs the oscillator signal which is subjected to the amplitude control to the push-pull amplifier circuit by the direct current negative feedback circuit; and the push-pull amplifier circuit is a post-stage amplifying circuit, amplifies the oscillator signal which is input and subjected to the amplitude control and outputs the oscillator signal to the outside. According to the invention, a transistor V5 adopts an emitter follower, so that an output load of the crystal oscillating circuit is less, and oscillation starting of the crystal is facilitated; and the capacitance of a capacitor which is connected in series with the crystal is increased, so that the capacitive reactance of the capacitor in the circuit is reduced, an alternating current which runs through the crystal is increased, and the driving power of the crystal is increased.

An image reading apparatus is composed of an image input unit for obtaining multi-valued image data by reading an image optically; an image processing unit for performing image processing including screen processing on the multi-valued image data obtained by the image input unit; a data converting unit for converting image data obtained by the image processing of the image processing unit into a form that is described in a page description language; and an image output unit for outputting image data obtained by the conversion of the data converting unit to the outside.