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Parallel control method employing selective harmonic elimination pulse width modulation (SHEPWM) for multiple T-type three-level inverters

A technology of a three-level inverter and a control method, which is applied to electrical components, output power conversion devices, and AC power input into DC power output, etc., can solve the problem of hardware mismatch dead time control algorithm execution time, influence IGBT switch tube life, increase system loss and other issues, to achieve the effect of solving the problem of circulating current suppression, low harmonic content, and solving the problem of midpoint voltage balance

Active Publication Date: 2016-06-22
SHANDONG UNIV
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Problems solved by technology

Therefore, T-type three-level inverters have been widely used in distributed power generation occasions such as photovoltaic power generation and micro-grid, but capacity has always been the bottleneck restricting its rapid development.
[0003] The parallel connection of multi-unit T-type three-level grid-connected inverters can increase system capacity, reliability and efficiency, and has become an important choice for high-power distributed power generation. However, hardware mismatch between modules, dead time and control algorithm execution Time and other differences will produce circulation
Circulating current will increase system loss and cause grid-connected current distortion, seriously affecting the life of IGBT switch tubes, so it is of great significance to study the circulating current suppression of parallel T-type three-level inverters

Method used

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  • Parallel control method employing selective harmonic elimination pulse width modulation (SHEPWM) for multiple T-type three-level inverters
  • Parallel control method employing selective harmonic elimination pulse width modulation (SHEPWM) for multiple T-type three-level inverters
  • Parallel control method employing selective harmonic elimination pulse width modulation (SHEPWM) for multiple T-type three-level inverters

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Embodiment Construction

[0052] The present invention will be further described below in conjunction with the accompanying drawings and embodiments.

[0053] like figure 1 As shown, the topology diagram of the three-level inverter parallel system is as follows figure 1 As shown, multiple inverters share the AC and DC buses, P and N are the positive and negative buses of the parallel system; A, B, and C are the three-phase grid-connected points of the parallel system; aj, bj, and cj are the AC outputs of the inverters end, C j1 、C j2 It is two capacitors connected in parallel with the DC side, and the midpoint is Z j , the system uses an L filter, and the filter inductance is L i , the zero sequence current is i zj , i mj is the m-phase output current of the j-th inverter, m=a, b, c, j=1, 2,; i A i B i C is the grid-connected current of the system.

[0054] as figure 2 The single inverter structure shown illustrates the inverter control strategy. Two capacitors C are connected in series o...

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Abstract

The invention discloses a parallel control method employing selective harmonic elimination pulse width modulation (SHEPWM) for multiple T-type three-level inverters. The parallel control method comprises the following steps of determining the quantity of switching angles of each period according to the quantity of harmonic orders needed to be eliminated; figuring out a switching angle of SHEPWM based on a multi-object particle swarm optimization method, and generating a corresponding SHEPWM signal; acquiring a neutral-point voltage and a zero-sequence loop current of a T-type three-level inverter parallel system; setting a time sequence, carrying out small vector control on the SHEPWM signal according to the neutral-point voltage or the zero-sequence loop current and the time sequence, and rewriting the SHEPWM signal. The neutral-point voltage or the zero-sequence loop current is controlled according to the set time sequence. Since the neutral points of the multiple inverters are connected, the neutral-point voltage of the system is balanced only by controlling the neutral-point voltage of an arbitrary inverter at a certain moment.

Description

technical field [0001] The invention relates to a parallel control method for multiple T-type three-level inverters using SHEPWM. Background technique [0002] With the large-scale access of distributed energy sources including photovoltaic power generation systems to the low-voltage distribution network, the power grid puts forward higher requirements on the output current waveform quality of grid-connected inverters. It is difficult for traditional two-level grid-connected inverters to meet large-scale Grid high power quality requirements. The emergence of T-type three-level grid-connected inverters solves the above problems, such as figure 2 As shown, compared with the traditional two-level inverter, the inverter has the advantages of small harmonics, low switching loss, and small electromagnetic interference; compared with the traditional diode-clamped three-level inverter, the inverter has The number of switches is small, the conduction loss is small, and the power lo...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H02M7/487H02M7/5395H02M1/12
CPCH02M1/12H02M7/487H02M7/5395H02M1/0038
Inventor 张承慧张桐盛杜春水陈阿莲秦昌伟邢相洋
Owner SHANDONG UNIV
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