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SHEPWM (selective harmonic elimination pulse width modulation) control circuit, double-T-type three-level SHEPWM inverter parallel system and method therefor

A three-level inverter, control circuit technology, applied in electrical components, AC power input into DC power output, output power conversion devices and other directions, can solve the hardware mismatch dead time control algorithm execution time, influence IGBT switch tube life, grid-connected current distortion and other issues, to achieve the effect of solving the problem of circulating current suppression, low harmonic content, and solving the problem of midpoint voltage balance

Active Publication Date: 2016-06-15
SHANDONG UNIV
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Problems solved by technology

Therefore, T-type three-level inverters have been widely used in distributed power generation occasions such as photovoltaic power generation and micro-grid, but capacity has always been the bottleneck restricting its rapid development.
[0003] The parallel connection of multi-unit T-type three-level grid-connected inverters can increase system capacity, reliability and efficiency, and has become an important choice for high-power distributed power generation. However, hardware mismatch between modules, dead time and control algorithm execution Time and other differences will produce circulation
Circulating current will increase system loss and cause grid-connected current distortion, seriously affecting the life of IGBT switch tubes, so it is of great significance to study the circulating current suppression of parallel T-type three-level inverters

Method used

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  • SHEPWM (selective harmonic elimination pulse width modulation) control circuit, double-T-type three-level SHEPWM inverter parallel system and method therefor
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  • SHEPWM (selective harmonic elimination pulse width modulation) control circuit, double-T-type three-level SHEPWM inverter parallel system and method therefor

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Embodiment Construction

[0069] Below in conjunction with accompanying drawing and embodiment the present invention will be further described:

[0070] The topology diagram of the three-level inverter parallel system is as follows: figure 1 As shown, the two inverters share the AC and DC busbars, P and N are the positive and negative busbars of the parallel system; A, B, and C are the three-phase grid connection points of the parallel system; aj, bj, and cj are the AC outputs of the inverters end, C j1 、C j2 It is two capacitors connected in parallel with the DC side, and the midpoint is Z j , the filter adopts LC filter, and the filter inductance is L i , the filter capacitor is C mj , the zero sequence current is i zj , i mj is the m-phase output current of the j-th inverter, m=a, b, c, j=1, 2, 3; i A i B i C is the grid-connected current of the system.

[0071] as figure 2 The single inverter structure shown illustrates the inverter control strategy. Two capacitors C are connected in s...

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Abstract

The invention discloses an SHEPWM (selective harmonic elimination pulse width modulation) control circuit, a double-T-type three-level SHEPWM inverter parallel system and method therefor. The double-T-type three-level SHEPWM inverter parallel system comprises two T-type three-level inverters, wherein the direct current sides of the three-level inverters are connected to a same direct current voltage source in parallel; each IGBT of the T-type three-level inverters is driven by the SHEPWM control circuit; and the alternating current sides of the T-type three-level inverters are filtered by a filter and then are connected in parallel to realize a grid connection function.

Description

technical field [0001] The invention belongs to the field of inverters, and in particular relates to a SHEPWM control circuit, a parallel connection system of two T-type three-level SHEPWM inverters and a method thereof. Background technique [0002] With the large-scale access of distributed energy sources including photovoltaic power generation systems to the low-voltage distribution network, the power grid puts forward higher requirements on the output current waveform quality of grid-connected inverters. It is difficult for traditional two-level grid-connected inverters to meet large-scale Grid high power quality requirements. The emergence of T-type three-level grid-connected inverters solves the above problems, such as figure 2 As shown, compared with the traditional two-level inverter, the inverter has the advantages of small harmonics, low switching loss, and small electromagnetic interference; compared with the traditional diode-clamped three-level inverter, the in...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H02M7/487H02M7/5395H02M1/12
CPCH02M1/12H02M7/487H02M7/5395H02M1/0038
Inventor 张承慧贾立朋杜春水陈阿莲张桐盛秦昌伟
Owner SHANDONG UNIV
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