Inverted Stacked Package
A packaging and chip technology, applied in electrical components, electrical solid devices, semiconductor devices, etc., can solve the problems of many interconnected interfaces, long production cycle, long connection length, etc., to reduce interconnection interfaces, shorten interconnection length, and improve production. The effect of efficiency
Active Publication Date: 2018-01-30
SAMSUNG SEMICON CHINA RES & DEV +1
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Problems solved by technology
That is to say, in the existing structure, because all wire connections are used, the connection length is long, and there are many interconnection interfaces, which is not conducive to the transmission of electrical signals, and because the wire bonding process takes a long time, the production cycle is relatively long
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[0022] Hereinafter, the inventive concept will be described in detail by explaining exemplary embodiments with reference to the accompanying drawings. However, the inventive concepts may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will inform the present Those of ordinary skill in the art fully convey the inventive concept.
[0023] In the drawings, the same reference numerals denote the same elements. Furthermore, various elements and regions are shown schematically. Accordingly, the inventive concepts are not limited to the relative sizes or distances shown in the drawings. It will be understood that although the terms first, second etc. may be used herein to describe various elements and / or components, these elements and / or components should not be limited by these terms. These terms are only used to disting...
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The invention provides an inverted stacked package, which can shorten the interconnection length and reduce the interconnection interface by changing the stacking mode, and at the same time improve the production efficiency. The inverted package on package includes: a substrate having a first surface and a second surface facing away from each other; a first chip located on the first surface of the substrate and electrically connected to the first surface of the substrate; a second chip located on the first surface of the substrate On a chip; the flexible carrier tape is located between the first chip and the second chip, and is insulated from the first chip and electrically connected to the second chip to the base; the encapsulation member is located on the base and encapsulates the first chip, the second chip Two chips and flexible carrier tape.
Description
technical field [0001] The invention relates to the field of semiconductor packaging, and the invention relates to an inverted stacked package, more specifically, to a dynamic random access memory (DRAM) inverted stacked package. Background technique [0002] In a conventional DRAM dual-chip stack package, two chips are vertically stacked and connected to the substrate with gold wires or wires made of other materials. [0003] Server electronic products have high-capacity requirements for DRAM. Due to size limitations, the capacity cannot be increased by increasing the chip area. Therefore, a stacking method is used to stack two chips in one package to increase capacity. [0004] More specifically, in flip-chip, figure 1 is a cross-sectional view showing the package 100 of the conventional flip-chip technology. The related art package 100 includes a substrate 110 , a plurality of chips 120 a and 120 b , and an encapsulation member 130 . A plurality of chips 120a and 120b ...
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IPC IPC(8): H01L27/108
CPCH10B12/50H10B12/00H01L2924/15311H01L2924/181H01L2224/16H01L2224/32145H01L2224/48091H01L2224/73265H01L2924/00012H01L2924/00014
Inventor 杜茂华
Owner SAMSUNG SEMICON CHINA RES & DEV