Multilayer interconnection structure of wafer level package, manufacturing method and application

A technology of wafer-level packaging and multilayer interconnection, applied in semiconductor/solid-state device manufacturing, electrical components, electric solid-state devices, etc., can solve problems such as large parasitic effects and large losses, and reduce parasitic effects and losses, reduce Loss, the effect of increasing packing density and production efficiency

Inactive Publication Date: 2012-01-11
SHANGHAI INST OF MICROSYSTEM & INFORMATION TECH CHINESE ACAD OF SCI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Active circuit chips such as MMIC usually realize the electrical interconnection between the chip and the substrate circuit through a wire bonding connection. The disadvantage of the wire bonding connection is that it introduces a large parasitic effect and has a large loss under high frequency conditions.
The thicker dielectric layer makes the packaging density and efficiency of the current MMCM module need to be further improved

Method used

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  • Multilayer interconnection structure of wafer level package, manufacturing method and application
  • Multilayer interconnection structure of wafer level package, manufacturing method and application
  • Multilayer interconnection structure of wafer level package, manufacturing method and application

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Embodiment Construction

[0034] Embodiments of the present invention will be further specifically described below with reference to the accompanying drawings in order to fully demonstrate the advantages and positive effects of the present invention. The scope of the present invention is not limited to the following examples.

[0035] Such as figure 2 Shown is a microwave multi-chip module wafer-level packaging structure according to an embodiment of the present invention. The multi-layer interconnection structure 120 based on the silicon substrate 101 is embedded with interconnection transmission lines 104 , ground layer 102 and various passive components, such as capacitors 103 , resistors 105 , inductors 106 , and miniature antennas 107 . Metal interconnects (eg, transmission lines 104 and vertical interconnect vias 108 ) and passive components within the multilayer interconnect structure are implemented by low-cost electroplating processes. The metal thickness is generally 1-5 microns, which can...

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Abstract

The invention provides a multilayer interconnection structure of wafer level package, a manufacturing method and application thereof. The multilayer interconnection structure is used for microwave multi chip modules. The invention is characterized by using benzocyclobutene (BCB) as a dielectric layer, realizing the multilayer connection structure of a metal / organic polymer by combining wafer level processing technics such as photoetching, electroplating, mechanical polishing and the like and embedding integrated varied passive devices and transmission lines for interconnection. The whole process is matched with IC process, is completed on the basis of wafer level and has higher integration of packaging and lower high-frequency transmission loss. The structure can effectively integrate varied function device units, reduce the interconnection loss among the devices and improve the properties of the whole module while improving the density and integration of packaging and reducing the cost of packaging.

Description

technical field [0001] The invention relates to a multi-layer interconnection structure, preparation method and application for microwave multi-chip module (Microwave Multi Chip Module, abbreviated as MMCM) wafer-level packaging. In particular, it relates to multilayer three-dimensional packaging structures including micromachining techniques such as mechanical polishing. Background technique [0002] Multi-chip module (Multi Chip Module, abbreviated as MCM), refers to the integration of multiple bare or / and packaged integrated circuit chips and single or multiple passive components, such as resistors, capacitors, inductors, etc., into a package substrate A technique on which a system or functional module is formed, figure 1 Shown is a schematic dissection diagram of a traditional MCM. Chips and components are mounted on a substrate, and the interconnection between the chip and the substrate or the chip and other devices is realized by wire bonding. Microwave Multi Chip Mo...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L25/00H01L27/00H01L23/522H01L21/50H01L21/60
CPCH01L2224/48091H01L2224/48227H01L2924/19105H01L2924/30107H01L2924/3025
Inventor 丁晓云耿菲罗乐
Owner SHANGHAI INST OF MICROSYSTEM & INFORMATION TECH CHINESE ACAD OF SCI
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