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NVM bad block recognition processing and error correcting method and system based on heterogeneous mixing memory

A hybrid memory and recognition processing technology, applied in the computer field, can solve problems such as non-applicability, bad blocks, and limited total number of NVM erases and writes.

Active Publication Date: 2016-07-20
深圳市研祥智慧科技股份有限公司
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Problems solved by technology

[0004] The characteristics of NVM in heterogeneous hybrid memory are different from DRAM. NVM has the inherent defect that the total number of erases and writes is limited. After reaching a certain number of erases and writes, NVM will fail, and the damage to the NVM storage area is permanent, and it is limited to today's NVM will inevitably have bad blocks due to manufacturing process and lifespan limitations. Conventional DRAM memory data processing methods do not involve NVM bad blocks, and are not suitable for NVM memory in heterogeneous hybrid memory.

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  • NVM bad block recognition processing and error correcting method and system based on heterogeneous mixing memory

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[0086] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.

[0087] In one embodiment, a kind of NVM bad block identification processing and error correction method based on heterogeneous mixed memory is provided, and the method comprises:

[0088] In the self-test process, execute: detect the data in each address unit in the block of NVM; if the data in any address unit in the block, the data obtained after the operation of the read data and the operation After the data obtained after writing the address unit, the data obtained by reading again is not the same, then it is determined that the block is a bad block; if the data in all address units in the bloc...

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Abstract

The invention provides an NVM bad block recognition processing and error correcting method based on a heterogeneous mixing memory and further provides an NVM bad block recognition processing and error correcting method based on the heterogeneous mixing memory.The method comprises the steps that in a self-checking process, data in each address unit in a block of an NVM is detected, if data obtained after read data is calculated is different from data obtained after reading data obtained through operation and written into the address unit, it is judged that the block is a bad block; if data obtained after read data is calculated is different from data obtained after reading data obtained through operation and written into the address unit, it is judged that the block is a good block.The read data is calculated and then written into the same address, the bad block in the NVM can be recognized, the misjudgment probability is reduced, and reliability and integrity of data in the NVM memory are guaranteed.

Description

technical field [0001] The invention relates to the technical field of computers, in particular to a heterogeneous hybrid memory-based NVM bad block identification processing and error correction method and system. Background technique [0002] With the development of emerging non-volatile random storage medium (Non-VolatileMemory, NVM) technology represented by resistance memory, ferroelectric memory, phase change memory, etc., the development of storage technology has been promoted, and new memory and storage architectures have been developed. A good foundation has been laid. By combining the new NVM and Dynamic Random Access Memory (Dynamic Random Access Memory, DRAM), a hybrid memory architecture is built to form a heterogeneous hybrid memory. Heterogeneous hybrid memory has the characteristics of NVM and DRAM at the same time. It not only has the function of conventional memory, but the data stored in DRAM will disappear immediately after power off, which is volatile; ...

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Application Information

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IPC IPC(8): G11C29/52G06F11/07
Inventor 薛英仪马先明庞观士陈志列王志远沈航梁艳妮徐成泽
Owner 深圳市研祥智慧科技股份有限公司
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