Fin field effect transistor, fin structure and manufacturing method of fin structure

Abstract

The invention provides a manufacturing method of a fin structure. The method comprises the following steps: providing a semiconductor substrate; forming silicon fins on the semiconductor substrate; forming holes in the surfaces of the silicon fins; and forming an epitaxial layer on each silicon fin. The epitaxial layers are made of an III or V semiconductor material. According to the fin structure, due to the holes, partial lattices of the fins deform; partial stress caused by lattice mismatch can be absorbed after different groups of epitaxial layers are formed on the fins; and the stress between the fins and the epitaxial layers is released.

Description

technical field [0001] The invention belongs to the field of semiconductor manufacturing, and in particular relates to a fin field effect transistor, a fin structure and a manufacturing method thereof. Background technique [0002] With the high integration of semiconductor devices, the channel length of MOSFET continues to shorten, and a series of effects that can be ignored in the long channel model of MOSFET become more and more significant, and even become the dominant factor affecting the performance of the device. This phenomenon is collectively called short channel road effect. The short channel effect will deteriorate the electrical performance of the device, such as causing a decrease in the gate threshold voltage, an increase in power consumption, and a decrease in the signal-to-noise ratio. [0003] In order to overcome the short-channel effect, a three-dimensional device structure of Fin Field Effect Transistor (Fin-FET) is proposed. Fin-FET is a transistor with...

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Problems solved by technology

[0005] However, the problem is that it is difficult to form a III-V semiconductor layer on a silicon fin due to the lattice mismatch between the III-V semiconductor material and silicon, and there is a stress effect between them.

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