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Remote dynamic updating system and method for multi-FPGA complete machine systems

A dynamic update and complete machine technology, applied in the direction of program loading/starting, program control design, program control device, etc., can solve problems such as the inability to meet the flexible configuration requirements of multi-FPGA complete machine systems, and achieve convenient and fast upgrades and remote operation , the effect of less physical resources

Active Publication Date: 2016-07-27
INST OF AUTOMATION CHINESE ACAD OF SCI
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Most of the existing FPGA configuration solutions focus on single-board or single-chip FPGA applications, which cannot meet the flexible configuration requirements of multi-FPGA complete systems.

Method used

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  • Remote dynamic updating system and method for multi-FPGA complete machine systems
  • Remote dynamic updating system and method for multi-FPGA complete machine systems
  • Remote dynamic updating system and method for multi-FPGA complete machine systems

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Embodiment Construction

[0025] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with specific embodiments and with reference to the accompanying drawings. It should be noted that, in the following description, many specific details are given for the convenience of understanding. It may be evident, however, that the present invention may be practiced without these specific details. It should be noted that, in the case of no explicit limitation or conflict, various embodiments of the present invention and technical features therein can be combined with each other to form a technical solution.

[0026] Embodiments of the present invention provide a remote dynamic update system for a multi-FPGA complete system, wherein the multi-FPGA complete system communicates with a remote host computer; figure 1 As shown, the system 10 at least includes: a first FPGA11, at least one second F...

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Abstract

The invention discloses a remote dynamic updating system and method for multi-FPGA complete machine systems. The system comprises a first FPGA, at least one second FPGA, an external flash memory, an external SDRAM memory and a communication interface, wherein the first FPGA is used for updating configuration file of the at least one second FPGA in the external flash memory and configuring the at least one second FPGA; the external flash memory is used for storing the first FPGA and the configuration file of the at least one second FPGA; the external SDRAM memory is used for temporarily storing updated configuration file of the at least one second FPGA; the communication interface is used for receiving a control word command sent by a remote upper computer and the configuration file of the at least one second FPGA. The system and method can be used for realizing the technical effects of being simple in structure, less in used physical resources, flexible, changeable and convenient to remotely operate, satisfying various experiment demands and enabling the complete machine systems to be conveniently and rapidly updated.

Description

technical field [0001] The embodiment of the present invention relates to the technical field of digital circuits, in particular to a remote dynamic update system and method for a multi-FPGA complete system. Background technique [0002] FPGA (Field-Programmable Gate Array) is a programmable logic device, which has abundant logic resources and IO resources. FPGA has the advantages of short design cycle, low development cost, low risk and high reliability, so it is widely used in digital systems. [0003] However, general-purpose large-capacity FPGAs are generally designed based on power-off volatile memory, which cannot save configuration files after power-off. In order to ensure that the FPGA can work normally, the FPGA must be reconfigured after each power-on. There are three commonly used FPGA configuration methods. The first is to use JTAG (JointTestActionGroup) online configuration. That is to say, use the download tool dedicated to the FPGA manufacturer to directly...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/445
CPCG06F9/44505G06F9/44578
Inventor 舒琳蒿杰赵良田穆敬彬冯卉宋亚芳范秋香李程程张忠红
Owner INST OF AUTOMATION CHINESE ACAD OF SCI
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