Remote dynamic update system and method for multi-fpga complete system

Abstract

The invention discloses a remote dynamic updating system and method for multi-FPGA complete machine systems. The system comprises a first FPGA, at least one second FPGA, an external flash memory, an external SDRAM memory and a communication interface, wherein the first FPGA is used for updating configuration file of the at least one second FPGA in the external flash memory and configuring the at least one second FPGA; the external flash memory is used for storing the first FPGA and the configuration file of the at least one second FPGA; the external SDRAM memory is used for temporarily storing updated configuration file of the at least one second FPGA; the communication interface is used for receiving a control word command sent by a remote upper computer and the configuration file of the at least one second FPGA. The system and method can be used for realizing the technical effects of being simple in structure, less in used physical resources, flexible, changeable and convenient to remotely operate, satisfying various experiment demands and enabling the complete machine systems to be conveniently and rapidly updated.

Description

Technical field [0001] The embodiment of the present invention relates to the technical field of digital circuits, and in particular to a remote dynamic update system and method for a multi-FPGA system. Background technique [0002] FPGA (Field-Programmable Gate Array) is a programmable logic device with abundant logic resources and IO resources. FPGA has the advantages of short design cycle, low development cost, low risk and high reliability, so it is widely used in digital systems. [0003] However, general-purpose large-capacity FPGAs are generally based on the design of volatile memory after power failure, which cannot save configuration files after power failure. In order to ensure the normal operation of the FPGA, the FPGA must be reconfigured after each power-on. There are three commonly used FPGA configuration methods. The first is to use JTAG (Joint Test Action Group) online configuration. That is, the FPGA configuration file is directly written into the volatile memo...

AI Technical Summary

Problems solved by technology

Most of the existing FPGA configuration solutions focus on single-board or single-chip FPGA applications, which cannot meet the flexible configuration requirements of multi-FPGA complete systems.

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