Ultrasonic emission channel time-delay control module

Abstract

The invention relates to an ultrasonic emission channel time-delay control module. The ultrasonic emission channel time-delay control module comprises an external controller PC, a time-delay parameter reading-writing bus, an FPGA chip internal block RAM, a plurality of channels, a high-voltage pulse forming module and a probe, and further comprises a counter and a plurality of comparers corresponding to the channels, wherein the FPGA chip internal block RAM loads a time-delay parameter ti to one input end of the comparers corresponding to the channels, and simultaneously loads a maximum value and a minimum value of the time-delay parameter ti to the counter to form a counting range of the counter; a real-time counting value of the counter is loaded to the other input end of the comparers; the comparers compare the real-time counting value of the counter with a time-delay parameter value, and if the real-time counting value of the counter is equal to the time-delay parameter value, the time-delay time of each channel is up, and the comparers output enabling levels to trigger the corresponding channels. According to the ultrasonic emission channel time-delay control module, occupied FPGA resources are reduced, and the cost performance of a system is improved.

Description

technical field [0001] The invention relates to the technical field of ultrasonic phased arrays, in particular to an ultrasonic transmission channel delay control module. Background technique [0002] The ultrasound system includes ultrasound probe 1, T / R switch 2, ultrasound reception 3, reception beamforming 4, signal processing and image display 5, transmission drive 6, transmission waveform generation 7, transmission delay control 8, and scanning control 9. like figure 1 Block diagram of the ultrasound system. The transmission delay control 8 controls the generation of the transmission waveform 7, and forms a high-voltage pulse through level conversion, which excites the probe 1, and the probe 1 converts electric energy into sound energy and transmits it. The probe 1 converts the received echo pulses into electrical energy, undergoes ultrasonic reception 3 , receives beam synthesis 4 , and then performs signal processing and image display. [0003] Converging and conv...

AI Technical Summary

Problems solved by technology

[0006] The traditional transmission module uses a delay counter for each transmission channel. The delay control module controls the delay counter to count according to the main clock. When the count value reaches the specified delay parameter, the trigger channel is enabled for transmission, and the 32 channels are 32 delay counters are required, occupying a large amount of buffer space, occupying a large amount of internal resources of the FPGA, increasing the system cost, and greatly reducing the cost performance of the system. In the high-precision delay module, the buffer space occupied by 32 counters is more Big

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