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A method of resisting power consumption attack based on random delay for des algorithm

A random delay and anti-power consumption technology, applied in encryption devices with shift registers/memory, digital transmission systems, secure communication devices, etc., can solve the problem of weakening the correlation between Hamming weight and power consumption of intermediate result data Completely resist power consumption attacks, high hardware resource overhead, etc., to achieve the effect of low hardware resource overhead, low performance overhead, and resistance to power consumption attacks

Active Publication Date: 2019-01-29
SOUTHEAST UNIV
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  • Claims
  • Application Information

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Problems solved by technology

[0005] For the existing methods of resisting power consumption attacks, from the perspective of implementation cost, most of them have disadvantages such as high hardware resource overhead, high performance overhead, and weak scalability. From the perspective of implementation effect, some only weaken the Hamming weight of intermediate result data The correlation between power consumption and power consumption, but the direct correlation between the two cannot be completely eliminated, so it is impossible to completely resist the power consumption attack based on Hamming weight

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  • A method of resisting power consumption attack based on random delay for des algorithm
  • A method of resisting power consumption attack based on random delay for des algorithm
  • A method of resisting power consumption attack based on random delay for des algorithm

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Embodiment Construction

[0020] The technical solution of the present invention will be further introduced below in combination with specific embodiments.

[0021] The traditional DES algorithm consists of three parts, such as figure 1 Shown are the initial permutation, 16 rounds of the same round operation, and the inverse initial permutation transformation. Each round requires a round key to complete the key addition operation, and there are a total of sixteen subkeys, denoted as Kn (n=0,...,16). The subkey is obtained from the initial key through initial permutation, left circular shift and permutation selection. The 16-cycle round operation in the middle of the DES algorithm includes five operations: extension, XOR operation, byte replacement, permutation, and XOR operation. At the end of each round of DES, two 32-bit intermediate value data will be generated, which can be recorded as Ln (n=0,...,16), and Rn (n=0,...,16) are stored in registers L and R, where L 16 and R 16 Combined into a 64-b...

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Abstract

The invention relates to a random-delay-based power consumption attack resisting method facing a DES (Data Encryption Standard) algorithm. In the DES algorithm, a random number generator and a random delay module are added, a plurality of paths with different time delays are provided between a register and a round operation module, and one path is randomly selected by a random number generated by the random number generator, so that a time point when the round operation module generates power consumption tends to randomization in one clock period. According to the random-delay-based power consumption attack resisting method facing the DES algorithm, which is disclosed by the invention, correlation of an assumed power consumption track in the DES algorithm, which is based on a Hamming weight, and an actual power consumption track is effectively reduced, and a power consumption attack based on a Hamming weight model can be effectively resisted to.

Description

technical field [0001] The invention relates to the technical field of integrated circuit hardware implementation and information security, in particular to a random delay-based DES algorithm-oriented anti-power consumption attack method. Background technique [0002] With the rapid development of Internet technology and information technology, information encryption technology has very important applications in many fields. Cryptographic products can be realized by software or hardware, but hardware-based cryptographic devices have become a research hotspot due to the advantages of faster speed and lower power consumption than software. Various cryptographic chips based on the DES (Data Encryption Standard, Data Encryption Standard) algorithm have been extensively researched and developed. [0003] Cryptographic chips are also facing various security risks. In recent years, side-channel attacks represented by differential power consumption attacks have posed severe challen...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L9/06H04L29/06
CPCH04L9/0625H04L9/0631H04L63/1441H04L63/1475
Inventor 曹鹏陆启乐申艾麟陈圣华刘波杨锦江
Owner SOUTHEAST UNIV