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VDMOS of groove structure

A technology of grooves and inner grooves, which is applied in the direction of electrical components, circuits, semiconductor devices, etc., can solve problems such as restricting reverse withstand voltage, high source-drain capacitance Cds, and affecting device dynamic characteristics, so as to improve reverse blocking The effect of low voltage, gate-to-drain capacitance Cds, and uniform distribution of lateral electric field

Inactive Publication Date: 2016-11-09
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the body field plate type VDMOS also has some disadvantages. The longitudinal electric field distribution in the drift region is as follows: figure 1 As shown, it can be seen that since the potential on the entire field plate is the same, the value of the longitudinal electric field in the drift region decreases along the vertical direction, which restricts the further improvement of the reverse withstand voltage
At the same time, since the body field plate is connected to the source of VDMOS, its source-drain capacitance Cds will be high, which affects the dynamic characteristics of the device

Method used

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Examples

Experimental program
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Effect test

Embodiment 1

[0016] like image 3 As shown, a VDMOS with a trench structure in this example includes a metallized drain 11, an N+ substrate 1, an N-drift region 2, and a metallized source 4 that are sequentially stacked from bottom to top; Region 2 has internal trenches 3, P-type doped regions 5, N-type heavily doped regions 6, P-type heavily doped regions 7, and trenches 8, and the P-type doped regions 5 are located in the internal trenches on both sides. Between the grooves 3, and the side of the P-type doped region 5 is in contact with the side of the groove 3 in the body; the N-type heavily doped region 6 is located on the upper surface of the P-type doped region 5, and the N-type heavily doped region 6 The upper surface is in contact with the lower surface of the metallized source electrode 4; the P-type heavily doped region 7 is located between the internal trench 3 and the N-type heavily doped region 6 and is located between the internal trench 3 and the N-type heavily doped region ...

Embodiment 2

[0036] The structure of this example is based on Example 1. All N-type materials in Example 1 are replaced with P-type materials, all P-type materials are replaced with N-type materials, and negative charges in the polysilicon 13 are replaced with positive charges.

[0037] When making devices, semiconductor materials such as silicon carbide, gallium arsenide, or silicon germanium can also be used instead of silicon.

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Abstract

The invention belongs to the technical field of semiconductors, and particularly relates to a VDMOS device of a groove structure. Two or more polysilicon islands wrapped by a silicon dioxide layer are mainly arranged in an inner groove. Negative charges are stored in the polysilicon islands. Due to the fact that the polysilicon islands are surrounded by an insulating layer, the negative charges are fixed in the polysilicon islands. The densities of negative charges stored in all the polysilicon islands are unequal. The closer the polysilicon island to the surface of the device, the higher the density of negative charges. During the reversely blocking process of the device, a transverse electric field is generated between a high-potential N type drift region and negative charges in the polysilicon islands, so that the depletion of the drift region is facilitated. Since the potential of the drift region is gradually reduced from bottom to top, the charge amount of the negative charges is increased from bottom to top. In this way, the distribution of the transverse electric field of the drift region is more uniform. Meanwhile, the distribution of the longitudinal electric field of the drift region is closer to the rectangular distribution. Therefore, the reverse blocking voltage of the device is improved. At the same time, no body field plate structure connected with a source electrode is adopted, so that the grid drain capacitance Cds is relatively low.

Description

technical field [0001] The invention belongs to the technical field of semiconductors, in particular to a VDMOS device with a trench structure. Background technique [0002] Power VDMOS is a multi-subconductor device, which has the advantages of fast switching speed, high input impedance, and easy driving. An ideal VDMOS should have low on-resistance, switching loss and high blocking voltage. However, there is a restraint effect between on-resistance and breakdown voltage, on-resistance and switching loss, which limits the development of power VDMOS. In order to improve device performance and reduce on-resistance, academician Chen Xingbi proposed a super-junction VDMOS structure. Compared with the traditional structure, the super-junction structure obtains a better trade-off relationship between device withstand voltage and on-resistance. Under the same device withstand voltage condition, the on-resistance of VDMOS with super-junction structure is smaller. [0003] Since ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/78H01L29/06
CPCH01L29/0657H01L29/7802
Inventor 任敏李爽李家驹罗蕾李泽宏张金平高巍张波
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA
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