Method and control system capable of accelerating configuration based on FPGA (Field Programmable Gate Array)
A technology of configuration bits and configuration data, applied in memory systems, program control design, program control devices, etc., can solve problems such as poor wiring layout, and achieve the effect of reducing configuration time, speeding up configuration, and reducing capacity
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[0031] Embodiments of the present invention are described in detail below, examples of which are shown in the drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by referring to the figures are exemplary only for explaining the present invention and should not be construed as limiting the present invention.
[0032] A method based on FPGA-accelerated configuration, such as figure 1 , image 3 shown, including the following steps:
[0033] Step 1: Store the configuration data bitstream generated by each configuration bit in the FPGA in Flash, and send the configuration data to the control module CTRL.
[0034] Step 2: the control module CTRL controls the data shift module DSR to output 1312 bits "0" to the bit line BL of the configuration module SRAM, wherein the control module CTRL is the control center for data download, and the data shift mo...
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