Serial peripheral interface host port

Abstract

A serial peripheral interface (SPI) host port is disclosed that enables a host external to a processor to access the processor's memory-mapped resources using SPI memory command protocol. An exemplary processor can include a system interconnect connected to memory-mapped resources and a SPI host port connected to the system interconnect. The SPI host port is configured to use SPI memory command protocol to access memory-mapped resources of the processor for the host external to the processor.

Description

technical field [0001] The present disclosure relates generally to processors, and more particularly, to providing a slave-supported serial peripheral interface for accessing memory-mapped resources of the processor. Background technique [0002] Electronic systems can combine different processors (including microprocessors, microcontrollers, digital signal processors, central processing units, or other types of processors) with circuitry to implement a particular application. One processor, typically called a master processor, can control the operation of another processor, typically called a slave processor. For example, a general-purpose processor may control the general operation of an electronic system as well as the operation of a special-purpose processor that performs specialized operations (such as a digital signal processor that performs specific signal processing operations under the control of the general-purpose processor). A host interface can be implemented t...

AI Technical Summary

Problems solved by technology

While existing host interfaces, such as parallel host port interfaces, are generally adequate for their intended purpose, they are not entirely satisfactory in many ways

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