Finfet device with independent tri-gate structure suitable for memory cells

Abstract

The present invention discloses a new FinFET device with an independent triple grid structure suitable for the storage unit.The grid medium layer includes: the left grille medium layer set on the left side of the fins structure, the right side grid medium layer set on the right side of the fin structure, and the top grille medium layer set on the top of the fin structure.The top gate medium layer is a U -shaped. Because the grid medium layer of the U -shaped structure is used, the parasitic capacitor between the top gate metal layer and the bottom grille metal layer is reduced, andcontrol ability.The new FINFET device with an independent triple grid structure proposed by the present invention shows the grid control characteristics of the SRAM storage unit., To further improve the performance of static storage circuits.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a novel FinFET device with an independent tri-gate structure suitable for memory cells. Background technique [0002] As the feature size of semiconductor integrated circuit technology continues to shrink to the nanometer level, the short channel effect of traditional planar MOS devices becomes more and more obvious, making it no longer able to meet the requirements of the industry. Instead, FinFET has gradually become a mainstream device with its excellent gate control capability. However, the three-dimensional structure of FinFET makes its width related to the height of Fin, resulting in reduced flexibility of FinFET-based circuit design. [0003] At present, the most widely applied prospect of FinFET-based circuits is memory circuits. Among them, the design and optimization of Static Random Access Memory (SRAM) composed of FinFETs has always been a research hotspot. ...

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Problems solved by technology

Although this device will increase the complexity of the process, the independence of the front-side gate metal layer and the back-side gate metal layer adds flexibility to the design of the SRAM, and thus gives rise to a variety of optimization methods, which can be referred to The following papers (Tawfik, S.A., Liu, Z., & Kursun, V. (2007). Independent-Gate and Tied-Gate FinFET SRAM Circuits: Design Guidelines for Reduced Area and Enhanced Stability, (December), 1–4. and Gupta ,S.K.,Kulkarni,J.P.,&Roy,K.(2013).Tri-Mode Independent Gate FinFET-Based SRAMWith Pass-Gate Feedback:Technology–Circuit Co-Design for Enhanced CellStability,60(11),3696–3704.)

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