Method and device for realizing SDH optical interface of STM-1 by employing oversampling method

Abstract

The invention discloses a method and device for realizing an SDH optical interface of STM-1 by employing an oversampling method. The method comprises (1), a sending path that an STM-1 transceiver generates STM-1 data frames under clock frequency of 19.44 M, conversion of a clock domain from 19.44 M to 38.88 M is carried out on the data frames through a sending clock domain converter, under the clock frequency of 38.88 M, each piece of 1-bit data is copied into 4-bit data through a sending data bit width converter, the data is sent to an STM-4 optical interface module for sending; and a receiving path that STM-1 signals from an STM-4 optical interface are received, oversampling of four times per level is carried out on the signals under the clock frequency of 38.88 M, an STM-1 frame header is found, conversion from 4-bit to 1-bit is carried out on the data, the data is converted into signals under the 19.44 M through a receiving clock domain converter, and the signals are sent to the STM-1 transceiver for frame decoding.

Description

Technical field [0001] The invention belongs to the field of wired transmission communication, and specifically relates to the design of an optical interface at the STM-1 rate in SDH, which can be applied to SDH transmission equipment and can also be applied to the design of SDH test instruments. Background technique [0002] SDH technology has been widely used in transmission systems to provide a variety of telecommunication services for a highly developed information society. Based on this, many companies have introduced optical interface chips that support SDH technology, including a series of Ethernet-over-SONET / SDH chips such as the DS33M30 / DS33M31 / DS33M33 launched by Maxim, which can support the transceiver of STM-1 signals; Cypress launched The OC-48Transceiver chip can support the sending and receiving of STM-16 signals. With the maturity of SDH technology, its optical interface modules have gradually developed in the direction of miniaturization, normalization, and embe...

AI Technical Summary

Problems solved by technology

[0003] However, the sampling frequency of the common interface of Xilinx's internal SerDes module is between 0.5G and 12.5G, and the signal rate of STM-1 is not within the acceptable sampling range of SerDes, so the processing of STM-1 signals cannot be compared with that of other speeds. same signal

This makes it impossible for the four commonly used SDH signals to be transmitted using the same interface.

If the STM-1 dedicated Transceiver chip is used to solve this problem, it will not only occupy the layout and wiring area of ​​the hardware circuit board, but also set a special STM-1 transceiver interface module inside the FPGA, which will also increase the complexity of the FPGA internal code architecture.

Images