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Depletion type P-type MOS transistor with convex gate electrode substrate

A MOS tube and depletion-type technology, applied in the field of P-type MOS tubes, can solve the problems of difficult adjustment, small gate control current of transistors, and poor control accuracy, etc., and achieve the goals of reducing leakage current, more conduction, and shortening the gate length Effect

Inactive Publication Date: 2017-01-04
WUXI HI NANO TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0002] In the prior art, the size of the MOS transistor is getting smaller and smaller. If the size of the depletion-type P-type MOS transistor is too small, the gate control current of the transistor is also very small, which is not easy to adjust, and the control accuracy is very poor.

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  • Depletion type P-type MOS transistor with convex gate electrode substrate

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Embodiment Construction

[0009] figure 1 It is a structural diagram of the present invention. Such as figure 1 As shown, the present invention includes a silicon substrate 1 . Both ends of the silicon substrate 1 are isolation regions 3 made of silicon oxide. There is a transition layer 2 between the isolation region 3 and the silicon substrate 1 . In the middle of the silicon substrate 1 is a polysilicon gate 5 . The bottom of the polysilicon gate 5 is convex upward. There is a layer of silicon dioxide 7 between the bottom of the polysilicon gate 5 and the silicon substrate 1 . The polysilicon gate 5 is topped by a layer of titanium polycide 6 . Between the polysilicon gate 5 and the isolation region 3 , there are P-type doped source regions 8 and drain regions 4 within the silicon substrate 1 . There are sidewalls 9 on both sides of the polysilicon gate 5 . At the bottom of the polysilicon gate 5 and in the silicon substrate 1, there is a P-type doped layer 10 connecting the source region 8 ...

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Abstract

The invention discloses a depletion type P-type MOS transistor with a convex gate electrode substrate. The depletion type P-type MOS transistor with the convex gate electrode substrate comprises a silicon substrate, wherein isolation regions made from silicon oxide are arranged at the two ends of the silicon substrate; a transition layer is arranged between each isolation region and the silicon substrate; a polycrystalline silicon gate is arranged in the middle of the silicon substrate; the bottom of the polycrystalline silicon gate is convex upwards; one layer of silicon dioxide is arranged between the bottom of the polycrystalline silicon gate and the silicon substrate; one layer of titanium polycrystalline compound is formed at the top of the polycrystalline silicon gate; P-type doped source region and drain region are formed between the polycrystalline silicon gate and the isolation regions and in the silicon substrate; side walls are arranged on two sides of the polycrystalline silicon gate; a P-type doped layer for connecting the source region with the drain region is formed at the bottom of the polycrystalline silicon gate and in the silicon substrate. In the depletion type P-type MOS transistor with the convex gate electrode substrate, the gate electrode substrate is convex upwards and can control on-off of a circuit on the two sides of the circuit. According to the design, circuit control can be greatly improved, leakage current can be reduced and the gate length of the transistor can be greatly shortened.

Description

technical field [0001] The invention relates to the field of integrated circuit manufacturing, in particular to a P-type MOS transistor with a protruding depletion gate substrate. Background technique [0002] In the prior art, the size of the MOS transistor is getting smaller and smaller. If the size of the depletion-type P-type MOS transistor is too small, the gate control current of the transistor is also very small, which is not easy to adjust, and the control accuracy is poor. Contents of the invention [0003] Aiming at the deficiencies of the prior art, the invention discloses a P-type MOS transistor with a protruding depletion gate substrate. [0004] Technical scheme of the present invention is as follows: [0005] A P-type MOS tube with a depletion gate substrate protruding, including a silicon substrate; two ends of the silicon substrate are isolation regions made of silicon oxide; the isolation region and the silicon substrate There is a transition layer in b...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/78H01L29/423
CPCH01L29/78H01L29/42356
Inventor 吕耀安
Owner WUXI HI NANO TECH