Depletion type P-type MOS transistor with convex gate electrode substrate
A MOS tube and depletion-type technology, applied in the field of P-type MOS tubes, can solve the problems of difficult adjustment, small gate control current of transistors, and poor control accuracy, etc., and achieve the goals of reducing leakage current, more conduction, and shortening the gate length Effect
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[0009] figure 1 It is a structural diagram of the present invention. Such as figure 1 As shown, the present invention includes a silicon substrate 1 . Both ends of the silicon substrate 1 are isolation regions 3 made of silicon oxide. There is a transition layer 2 between the isolation region 3 and the silicon substrate 1 . In the middle of the silicon substrate 1 is a polysilicon gate 5 . The bottom of the polysilicon gate 5 is convex upward. There is a layer of silicon dioxide 7 between the bottom of the polysilicon gate 5 and the silicon substrate 1 . The polysilicon gate 5 is topped by a layer of titanium polycide 6 . Between the polysilicon gate 5 and the isolation region 3 , there are P-type doped source regions 8 and drain regions 4 within the silicon substrate 1 . There are sidewalls 9 on both sides of the polysilicon gate 5 . At the bottom of the polysilicon gate 5 and in the silicon substrate 1, there is a P-type doped layer 10 connecting the source region 8 ...
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