Electro-optical 3-8 decoder

Abstract

The invention discloses an electro-optical 3-8 decoder. The electro-optical 3-8 decoder comprises a first electrical input end (171), a second electrical input end (172), a third electrical input end (173), a first annular waveguide (101), a second annular waveguide (102), a third annular waveguide (103), a fourth annular waveguide (104), a first waveguide (110), a second waveguide (120), a third waveguide (130), a fourth waveguide (140), a fifth waveguide (150) and a sixth waveguide (160). Each annular waveguide is coupled with the corresponding waveguide to form a microring resonator; and an electrical signal input from each electrical input end is used for enabling the corresponding microring resonator to be in a special-wavelength resonant state or not in the resonant state, so that special-wavelength optical signals input from an optical input end are allowed to reach different optical output ends. The electro-optical 3-8 decoder can improve the performance of the device.

Description

technical field [0001] The present invention relates to the field of information technology, and more particularly, to an electro-optical 3-8 decoder. Background technique [0002] With the continuous shrinking of the feature size of the processor chip, the number of transistors integrated on a single chip is increasing, and the integrated circuit chip is developing rapidly in the direction of high speed and high integration. The clock frequency of a typical microprocessor chip reaches several GHz. However, on the one hand, the further reduction of chip feature size in integrated circuits is limited by basic physical principles such as quantum tunneling effects, which makes the space for improving the performance of digital signal processors limited; the way to improve system performance by integrating multiple digital signal processors Inevitably constrained by inter-chip communication overhead; on the other hand, the further reduction of chip feature size in integrated cir...

AI Technical Summary

Problems solved by technology

The traditional medium-scale integrated circuit decoder generally adopts a gate circuit structure (such as a 3-8 line decoder). Since this traditional decoder is formed by cascading multiple gate circuits, its power consumption, There are great disadvantages in delay, volume, etc.

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