AES algorithm oriented power attack resisting method based on register mask

A register and anti-power consumption technology, applied in encryption devices with shift registers/memory, countermeasures against encryption mechanisms, digital transmission systems, etc., can solve problems such as high hardware resource overhead, high performance overhead, and elimination of correlation , to achieve strong scalability and versatility, low hardware resource overhead, and resistance to power consumption attacks

Active Publication Date: 2017-02-22
SOUTHEAST UNIV
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Problems solved by technology

[0006] For the existing methods of resisting power consumption attacks, from the perspective of implementation cost, most of them have shortcomings such as large hardware resource overhead, high performance overhead, and weak scalability. From the perspective of implementation effect, some on

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  • AES algorithm oriented power attack resisting method based on register mask
  • AES algorithm oriented power attack resisting method based on register mask
  • AES algorithm oriented power attack resisting method based on register mask

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Embodiment Construction

[0021] The technical solution of the present invention will be further introduced below in combination with specific embodiments.

[0022] The traditional AES algorithm block encryption algorithm is composed of 3 parts, which are initial key addition, 9 rounds of the same round operation and the 10th round of final transformation. Each round requires a round key to complete the key addition operation, a total of eleven subkeys, denoted as K n (n=0,...,10). The subkey is obtained by expanding the initial key. The 9-cycle round operation in the middle of the AES algorithm includes four operations: byte replacement, row shift, column mixing, and key addition. The transformation at the end of the tenth round includes three operations: byte replacement, row shift and key addition. AES will generate an intermediate value data at the end of each round, which can be recorded as D n (n=0,…,10), stored in registers, where D 10 is the ciphertext output. Such as figure 1 As shown, ...

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Abstract

The invention discloses an AES algorithm oriented power attack resisting method based on a register mask. The method comprises the following steps: adding a random number generator and a register protection module in an AES algorithm, wherein the register protection module comprises a first XOR unit, a second XOR unit and a register; saving an intermediate result in the register after performing XOR on an intermediate result needing to be saved and a random number when updating the intermediate result in the register, and saving the random number at the same time; and reading a value in the register and performing the XOR on the value and the saved random number when reading the intermediate result in the register. Through the adoption of the method disclosed by the invention, the randomness of the storage value in the register is guaranteed, the Hamming distance leakage in the AES cryptographic algorithm is effectively hidden, and the power attack based on a Hamming distance model can be effectively resisted.

Description

technical field [0001] The invention relates to the technical field of integrated circuit hardware implementation and information security, in particular to an AES algorithm-oriented anti-power attack method based on a register mask. Background technique [0002] With the rapid development of Internet technology and information technology, information encryption technology has very important applications in many fields. Cryptographic products can be realized by software or hardware, but hardware-based cryptographic devices have become a research hotspot due to the advantages of faster speed and lower power consumption than software. Various cryptographic chips based on the AES (Advanced Encryption Standard, Advanced Encryption Standard) algorithm have been extensively researched and developed. [0003] Cryptographic chips are also facing various security risks. In recent years, side-channel attacks represented by differential power consumption attacks have posed severe chal...

Claims

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Application Information

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IPC IPC(8): H04L9/06H04L9/00
CPCH04L9/003H04L9/0631
Inventor 曹鹏陈圣华申艾麟陆启乐刘波杨锦江
Owner SOUTHEAST UNIV
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