Integrated circuit method and integrated circuit design system

Abstract

The invention provides an integrated circuit method and an integrated circuit design system. The integrated circuit (IC) method includes receiving an IC design layout; and performing an inverse beam technology (IBT) process to the IC design layout, thereby generating a final mask pattern, wherein the IBT process uses a single IBT model to simulate both a mask making process and a wafer making process.

Description

technical field [0001] The invention relates to a method for producing a mask, in particular to a method for producing a mask for a semiconductor wafer. Background technique [0002] With the continuous advancement of semiconductor technology for size reduction (for example, 32nm, 28nm and below 20nm process), integrated circuit design is becoming more and more difficult. The performance of a designed circuit is heavily affected by the image of various circuit patterns, such as doped wells, sources and drains, gates, vias / contact pads, and other circuit features. As advanced circuit designs have three-dimensional architectures that include fin-like active regions, it further complicates the difficulty of forming circuits with proper shape and size requirements. In order to enhance the imaging effect during the conversion of the designed pattern into the wafer, optical proximity correction (optical proximity correction, OPC) is indispensable. The designed pattern is adjuste...

AI Technical Summary

Problems solved by technology

Current methods cannot effectively provide optimized wafers under the constraints of circuit performance and manufacturing cost

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