Integrated circuit design and manufacturing method and integrated circuit design system

Abstract

The invention provides an integrated circuit design and manufacture method and an integrated circuit design system. The integrated circuit design and manufacturing method includes: receiving an integrated circuit layout file; and performing a reverse electron beam technology process on the integrated circuit layout file to generate a final mask pattern, wherein the reverse electron beam technology process uses a single reverse electron Beam technology models to simulate a mask process as well as wafer process.

Description

technical field [0001] The invention relates to a method for producing a mask, in particular to a method for producing a mask for a semiconductor wafer. Background technique [0002] With the continuous advancement of semiconductor technology for size reduction (for example, 32nm, 28nm and below 20nm process), integrated circuit design is becoming more and more difficult. The performance of a designed circuit is heavily affected by the image of various circuit patterns, such as doped wells, sources and drains, gates, vias / contact pads, and other circuit features. As advanced circuit designs have three-dimensional architectures that include fin-like active regions, it further complicates the difficulty of forming circuits with proper shape and size requirements. In order to enhance the imaging effect in the process of converting the designed pattern into the wafer, optical proximity correction (optical proximity correction, OPC) is indispensable. The designed pattern is adj...

AI Technical Summary

Problems solved by technology

Current methods cannot effectively provide optimized wafers under the constraints of circuit performance and manufacturing cost

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