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Package substrate, package structure and manufacturing method thereof

A technology for packaging substrates and manufacturing methods, which is applied in semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, semiconductor devices, etc., and can solve problems such as bending, insufficient yield of packaging products, and easy breakage of packaging substrates.

Active Publication Date: 2019-06-18
LEADING INTERCONNECT SEMICON TECH SHENZHEN CO LTD +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, due to the lightness and thinness of the packaging substrate, the packaging substrate is prone to abnormal phenomena such as breakage and bending during the manufacturing process, and corresponding problems also occur in the subsequent packaging process, resulting in a serious shortage of the yield of the final packaging product.

Method used

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  • Package substrate, package structure and manufacturing method thereof
  • Package substrate, package structure and manufacturing method thereof
  • Package substrate, package structure and manufacturing method thereof

Examples

Experimental program
Comparison scheme
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other Embodiment approach

[0075] In other embodiments, a substrate including the dielectric layer 12 and the removable support plate 11 may be directly provided.

[0076] In the third step, see image 3 , opening a first blind hole 123 in the dielectric layer 12 .

[0077] In this embodiment, the first blind hole 123 is opened from the first surface 121 into the dielectric layer 12 . The first blind hole 123 penetrates through the dielectric layer 12 . Part of the first peeling layer 114 is exposed from the first blind hole 123 . The diameter of the first blind hole 123 ranges from 50 to 70 microns. The first blind hole 123 can be opened by laser ablation or mechanical drilling. In this embodiment, the first blind hole 123 is formed by laser ablation.

[0078] Step four, see Figure 4 , forming a first electroplating stop layer 131 on the surface of the second peeling layer 115 .

[0079] The first electroplating stop layer 131 completely covers the second peeling layer 115 . The first electrop...

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Abstract

The invention relates to a package substrate. The package substrate comprises a dielectric layer, first conductive circuit layers, first elastic connection pads, second conductive circuit layers, a bearing plate and a welding prevention layer, wherein first conductive holes and second conductive holes are formed in the dielectric layer, are arranged coaxially and communicate with each other, the first conductive circuit layers and the second conductive circuit layers are respectively arranged at two sides, opposite to each other, of the dielectric layer and are electrically connected via the first conductive holes and the second conductive holes, the first electrical connection pads are arranged on the first conductive circuit layers in a protruding way and are corresponding to the first conductive holes, the bearing plate covers the first electrical connection pads, the first conductive circuit layers and a part of the dielectric layer which is exposed out of the first conductive circuit layers, the welding prevention layer is formed on the second conductive circuit layers, a plurality of openings are formed in the welding prevention layer, a part of the second conductive circuit layers are exposed out of the openings to form second electrical connection pads. The invention also comprises a package structure, a package substrate fabrication method and a package structure fabrication method.

Description

technical field [0001] The present invention relates to the technical field of circuit board manufacturing, and in particular to a packaging substrate, a packaging structure including the packaging substrate, a method for manufacturing the packaging substrate, and a method for manufacturing the packaging structure including the packaging substrate. Background technique [0002] As electronic products become thinner and lighter, chip packaging substrates are also gradually developing in a thinner and lighter direction. However, due to the lightness and thinness of the packaging substrate, the packaging substrate is prone to abnormal phenomena such as breakage and bending during the manufacturing process, and corresponding problems also occur in the subsequent packaging process, resulting in a serious shortage of the yield of the final packaging product. Contents of the invention [0003] In view of this, it is necessary to provide a packaging substrate, a packaging structur...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/48H01L21/60H01L23/498
CPCH01L2224/73204
Inventor 黄昱程
Owner LEADING INTERCONNECT SEMICON TECH SHENZHEN CO LTD