pldmos device and its manufacturing method
A manufacturing method and device technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problems of low doping concentration, device source-drain punch-through, etc., and achieve the effect of suppressing source-drain punch-through
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[0062] like figure 2 Shown is the structural diagram of the PLDMOS device of the embodiment of the present invention, the PLDMOS device of the embodiment of the present invention includes:
[0063] N-type epitaxial layer 103a, the N-type epitaxial layer 103a is formed on the surface of a P-type substrate such as a P-type silicon substrate 101, and an N-type epitaxial layer 103a is isolated from the P-type substrate 101. buried layer 102 .
[0064] A P well 105 is formed in a selected region of the N-type epitaxial layer 103a, and the P well 105 serves as a drift region.
[0065] There is a field oxide layer on the surface of the N-type epitaxial layer 103a in the region of the P well 105, and this field oxide layer is called the first field oxide layer 104a.
[0066] The channel region is formed by superimposing N-type ion-implanted impurities on the N-type epitaxial layer 103a, and the N-type doping concentration of the channel region is increased through the N-type ion-im...
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