Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Network-on-chip task scheduling method and device

An on-chip network and task scheduling technology, applied in the electronic field, can solve the problems that the scheduling scheme is easy to fall into local optimum, and the parallel mechanism of evolutionary algorithm is not fully utilized, so as to achieve the effect of reducing dependence

Active Publication Date: 2017-05-03
CHENGDU UNIVERSITY OF TECHNOLOGY
View PDF3 Cites 11 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In addition, the traditional evolutionary thinking still has certain dependence on the selection of the initial population, the scheduling scheme is easy to fall into local optimum, and the parallel mechanism of the evolutionary algorithm is not fully utilized.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Network-on-chip task scheduling method and device
  • Network-on-chip task scheduling method and device
  • Network-on-chip task scheduling method and device

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0024] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments It is a part of embodiments of the present invention, but not all embodiments. Accordingly, the following detailed description of the embodiments of the invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely represents selected embodiments of the invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0025] Such as figure 1 As shown, it is a schematic block diagram of a smart device 100 that is app...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The embodiments of the invention provide a network-on-chip task scheduling method and device, and belong to the technical field of electronics. After tasks are grouped according to the execution relation between the tasks, the method schedules the tasks based on a quantum evolutionary algorithm by optimizing communication power consumption and communication time as goals, thereby avoiding communication hot spots to achieve load balance, reducing the dependency of the scheduling result on an evolutionary parameter and an initial population, and finally obtaining an optimal scheduling scheme meeting the optimal property index by sufficiently using the parallel mechanism of quantum evolution.

Description

technical field [0001] The present invention relates to the field of electronic technology, in particular, to a network-on-chip task scheduling method and device. Background technique [0002] With the rapid development of information technology in today's society, many application fields such as handheld intelligent terminals, automatic control, and big data computing processing have put forward higher requirements for the functions and performance of integrated circuit system-on-chip, and the integration of multi-core system-on-chip has been greatly improved. As a result, the complexity and implementation difficulty of the SoC are greatly increased. The development trend of high-performance multi-core system-on-chip must be the development and application of network-on-chip. [0003] The network on a chip borrows the structure of the computer interconnection network, and solves the communication bottleneck problem of the traditional bus structure of the system on a chip. ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/48G06N3/12
CPCG06F9/4881G06F2209/486G06N3/126Y02D10/00
Inventor 乐千桤张小松杨国武宋晓宇曹林秦辉
Owner CHENGDU UNIVERSITY OF TECHNOLOGY
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products