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Latch initialization for a data storage device

A technology of data storage and memory, applied in the field of latch initialization

Active Publication Date: 2017-05-24
SANDISK TECH LLC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In some cases, this technique may still result in the encoding of common values ​​to adjacent storage elements, e.g., where there are "gaps" in the data to be written (in this case, repeated "default" values Sequences can be written instead of gaps, e.g. a sequence of logic "0" values ​​or logic "1" values)

Method used

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  • Latch initialization for a data storage device
  • Latch initialization for a data storage device
  • Latch initialization for a data storage device

Examples

Experimental program
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Embodiment Construction

[0011] The write process used by non-volatile memory may use a multi-stage write process to write a page of data into non-volatile memory. For example, a write process may include sending a write opcode to a memory die (eg, by a memory controller or by a host computer). The memory die may initialize page-sized volatile latches to receive data to be written into non-volatile memory. For example, the initialization may set all bits of the latch to a logic "1" state or a logic "0" state. In some implementations, initializing the latches is performed after sending a destination address associated with the data to the memory die.

[0012] The memory controller or host computer may send one or more bytes of the address to perform the write operation. The address may include two elements: an identification of the page to be written (e.g., die number, plane number within a die, block number within a plane, and / or page number within a block) and a starting point within the page. An ...

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Abstract

A data storage device may include a memory die. The memory die includes a memory and a latch. A method may include receiving a command corresponding to a write operation to write information to the memory. The method may further include loading a set of bits into the latch prior to receiving the information at the memory die. The set of bits includes at least a first bit having a first value and a second bit having a second value that is different than the first value. The method further includes receiving the information at the memory die and overwriting at least a portion of the set of bits at the latch with the information.

Description

technical field [0001] The present disclosure relates generally to a data storage device and more particularly to latch initialization of a data storage device. Background technique [0002] Non-volatile data storage devices have enabled increased portability of data and software applications. For example, multi-level cell (MLC) storage elements of a memory device may each store values ​​indicative of multiple bits of data, thereby enhancing data storage density over single-level cell (SLC) memory devices. Thus, memory devices enable users to store and access large amounts of data. In some cases, data may include a sequence of consecutive values ​​(eg, a string of logical "0" values ​​or a string of logical "1" values). [0003] Storing a common value in multiple adjacent storage elements can degrade the performance of a memory device, such as by causing large leakage currents in some memory devices. To illustrate, in resistive random access memory (ReRAM), programming a ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C7/10G11C11/56G11C13/00G11C16/10G11C16/34
CPCG11C7/1006G11C7/1009G11C7/1087G11C11/5614G11C11/5628G11C13/0033G11C13/0069G11C16/10G11C16/3427G11C7/20G11C11/5671G11C16/20
Inventor M.拉瑟
Owner SANDISK TECH LLC