Spiking neuron hardware architecture for AER feed-forward classification systems
A classification system and hardware architecture technology, applied in biological neural network models, physical implementation, etc., can solve the problems of low parallelism, inability to achieve equipment miniaturization, and high cost, and achieve a large volume, which is conducive to miniaturization and real-time performance. Effect
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[0026] The neuron hardware structure of the classification system SNN proposed by the present invention is as follows: figure 2 shown. Spike neurons can be specifically divided into weight storage area, weight read-write gate, membrane potential multiplication accumulator, PSP function generator, trigger judge, control and timing, and weight correction module. There are 7 parts in total. Some functions are as follows:
[0027] (1) Control and timing: In order to meet the internal coordination of neurons and the speed of network processing, two internal clocks, CLK and SLOW_CLK, are required. The CLK clock cycle is much smaller than SLOW_CLK, which is determined by comparing with pulse code sampling and membrane potential speed of network processing. SLOW_CLK is used to coordinate the internal work of neurons, and all input membrane potential accumulation results can be obtained in less than one SLOW_CLK period. In addition, the RST signal is required for reset to zero, and...
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