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IOL test verification method and device

It is a technology for test verification and verification, which is applied in the direction of measuring devices, electronic circuit testing, and measuring electronics. It can solve the problems of unguaranteed correctness and lack of verification means for IOL testing, and achieve the effect of ensuring accuracy.

Inactive Publication Date: 2017-06-09
SHENZHEN PANGO MICROSYST CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The present invention aims to solve the problem that the IOL test in the FPGA lacks verification means and the correctness cannot be guaranteed in the prior art

Method used

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  • IOL test verification method and device
  • IOL test verification method and device

Examples

Experimental program
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Embodiment 1

[0036] This embodiment provides an IOL test verification method, see figure 1 , including:

[0037] S101. Connect each IOL unit to be verified in the FPGA in series, and establish a comparison chain corresponding to the IOL units at all levels;

[0038] S102. Input the excitation to the first-level IOL unit and the comparison chain in the series-connected IOL units, and transmit the excitation along the series-connected IOL units, wherein the output of the upper-level IOL unit is used as the next-level IOL unit input of;

[0039] S103. Compare the outputs of the IOL units at all levels with the outputs of the corresponding comparison chains, and determine whether the functions and / or connection relationships of the IOL units are normal according to the comparison result.

[0040] In the design of digital integrated circuits, the size is getting smaller and the chip pins are getting denser and denser. A simple and efficient method is needed to realize the rapid screening of c...

Embodiment 2

[0059] This embodiment provides an IOL test verification method, please refer to Figure 4 , including:

[0060] A creation module 401 is used to connect each IOL unit to be verified in the FPGA in series, and establish a comparison chain corresponding to the IOL units at all levels;

[0061] The input module 402 is used to input the excitation to the first-level IOL unit and the comparison chain in the IOL units connected in series, and the excitation is transmitted along the series-connected IOL units, wherein the output of the IOL unit of the previous level is used as the next IOL unit. The input of the IOL unit of the stage;

[0062] The comparison module 403 is configured to compare the outputs of the IOL units at all levels with the outputs of the corresponding comparison chains, and judge whether the function and / or connection relationship of the IOL units is normal according to the comparison result.

[0063] In the design of digital integrated circuits, the size is ...

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Abstract

The embodiment of the invention provides an IOL test verification method and device; the method comprises the following steps: cascading various to-be-verified IOL units in a FPGA, and building a comparison chain corresponding to each level IOL unit; inputting excitation into the first level IOL unit and the comparison chain of the cascaded IOL units, allowing the excitation to transfer along the cascaded IOL units, wherein the output of the previous level IOL unit serves as the input of the next level IOL unit; comparing the output of each level IOL unit with the corresponding comparison chain output, and determining whether the IOL unit function and / or connection relation are normal or not according to the comparison result. The method compares the outputs between the IOL unit chain and the comparison chain, thus determining whether the IOL function is normal or not, and verifying the connecting relations of pins of all units are correct or not, thus ensuring the IOL testing accuracy.

Description

technical field [0001] The invention relates to the field of integrated circuit design, in particular to an IOL test verification method and device. Background technique [0002] With the rapid development of integrated circuits, FPGA, as a programmable logic device, has gradually evolved from a peripheral device of electronic design to the core of a digital system in just over two decades. With the advancement of semiconductor process technology, the design technology of FPGA devices has achieved rapid development and breakthroughs, achieving the characteristics of high density, high security, low power consumption, low cost, system integration, and dynamic reconfiguration. FPGA has been widely used in communication, aerospace, consumer electronics and other fields. In order to continue to improve performance and reduce power consumption, the use of 20nm and 14nm processes has become an inevitable choice. [0003] However, as the FPGA integration density is getting higher ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G01R31/28
CPCG01R31/2853
Inventor 张健蒯金
Owner SHENZHEN PANGO MICROSYST CO LTD
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