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Resistive memory and memory cell thereof

A resistive, memory cell technology, applied in the direction of information storage, static memory, digital memory information, etc., can solve the problem that data cannot be interpreted

Active Publication Date: 2017-06-16
WINBOND ELECTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, when one of the two memory cells fails to transition, this method will make the stored data unreadable and cannot solve the above-mentioned problems

Method used

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  • Resistive memory and memory cell thereof
  • Resistive memory and memory cell thereof
  • Resistive memory and memory cell thereof

Examples

Experimental program
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Embodiment Construction

[0033] Please refer to figure 1 , figure 1 is a schematic diagram of a resistive memory cell according to an embodiment of the present invention. The resistive memory cell 100 includes bit line switches BSW1, BSW2, resistors R1, R2, and word line switches WSW1, WSW2. The first end of the bit line switch BSW1 receives the bit line signal BL, and is controlled by the bit line selection signal BLS to be turned on or off. A first end of the resistor R1 is coupled to a second end of the bit line switch BSW1. The word line switch WSW1 is connected in series between the second end of the resistor R1 and the source line SL0 , and is controlled by the word line signal WL0 to be turned on or off. The first end of the bit line switch BSW2 receives the bit line signal BL, and is controlled by the bit line selection signal BLS to be turned on or off. A first end of the resistor R2 is coupled to a second end of the bit line switch BSW2. The word line switch WSW2 is connected in series ...

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Abstract

The present invention provides a resistive memory and a memory cell thereof. The resistive memory cell comprises a first bit line switch, a first resistor, a first word line switch, a second bit line switch, a second resistor and a second word line switch, wherein the first bit line switch and the second bit line switch receive bit line signals and are controlled by bit line selection signals so as to be turned on or off, the first resistor is coupled between the first bit line switch and the first word line switch, the first word line switch is controlled by a word line signal so as to be turned on or off, the second resistor is coupled between the second bit line switch and the second word line switch, the second word line switch is controlled by a word line signal so as to be turned on or off, and when the resistive memory cell is programmed, the resistance values of the first resistor and the second resistor are simultaneously programmed into the high impedance values or simultaneously programmed into the low impedance values. With the resistive memory and the memory cell of the present invention, the reading boundary can be adjusted, and the data error data caused by the transition phenomenon can be reduced, wherein the resetting of the cycle with the memory cell causes the transition phenomenon.

Description

technical field [0001] The invention relates to a resistive memory and its memory cell, in particular to a resistive memory cell with an adjustable reading boundary. Background technique [0002] With the advancement of electronic technology, electronic products have become a necessary tool in people's life. In order to meet the data storage function required by electronic products, various non-volatile memories have been proposed, including resistive memories. [0003] In the prior art, after the memory cells of the resistive memory go through a set-reset cycle, there may be a certain probability that high and low impedance transitions fail. According to statistics, there are about 35% of such transition failures. Such a high proportion of transition failures reduces the reliability of data stored in the resistive memory, and greatly reduces the performance of the resistive memory. [0004] In view of the above problems, the prior art proposes to store data by making the...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C13/00
CPCG11C13/0026G11C13/0028G11C29/74G11C2013/0054G11C2013/0088G11C13/0069G11C13/004G11C13/0007
Inventor 陈建隆
Owner WINBOND ELECTRONICS CORP