Triple-modular-redundancy anti-radiation reinforced clock generation circuit based on phase-locked loops

A clock generation circuit, anti-radiation reinforcement technology, applied in the direction of radiation resistance enhancement, electrical components, automatic control of power, etc. Achieving the effect of convenience, ensuring stability and reliability, and strong immunity

Inactive Publication Date: 2017-07-07
BEIJING MXTRONICS CORP +1
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  • Abstract
  • Description
  • Claims
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Problems solved by technology

Since there are many sensitive nodes inside the phase-locked loop, only the nodes with greater influence can be reinforced and designed, which only reinforces the SET effect from a high probability and reduces the error rate; the other is to systematically Level reinforcement, such as the existing two-mode redundant reinforcement structure, because this method switches and outputs the two signals after an error indication occurs, the time response cannot be switched in time, and the reinforcement effect is not good

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  • Triple-modular-redundancy anti-radiation reinforced clock generation circuit based on phase-locked loops
  • Triple-modular-redundancy anti-radiation reinforced clock generation circuit based on phase-locked loops
  • Triple-modular-redundancy anti-radiation reinforced clock generation circuit based on phase-locked loops

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Embodiment Construction

[0023] The present invention will be described in further detail below in conjunction with the accompanying drawings.

[0024] A three-mode redundant radiation-resistant hardened clock generation circuit based on a phase-locked loop, such as figure 1 As shown, it includes a phase-locked loop 2, a voting unit 3 and a digital filtering unit 4,

[0025] There are three phase-locked loops 2, three independent phase-locked loops connected in parallel, the output clock signals are CK1, CK2, CK3, in normal operation, CK1, CK2, CK3 have the same frequency, voting unit 3 receives CK1, CK2, CK3 Clock signal: when at least two levels of CK1, CK2, and CK3 are the same, at least two signals CK with the same level are transmitted to the digital filter unit 4 through voting, and the digital filter unit 4 processes the signal CK obtained by voting , if there is a glitch, the signal will be output after filtering out the glitch; if there is no glitch, the signal will be output directly.

[0...

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Abstract

The invention discloses a triple-modular-redundancy anti-radiation reinforced clock generation circuit based on phase-locked loops. The circuit comprises three independent phase-locked loops in parallel connection, a voting unit and a digital filtering unit; when at least two of CK1, CK2 and CK2 are the same in level, the at least two signals CK of the same level are transmitted to the digital filtering unit via voting, the digital filtering processes the signals CK obtained by voting, and the signals are output after removing burrs if there are burrs; and the signals are output directly if there are no burrs. According to the invention, a triple-modular-redundancy structure of a phase-locked loop structure is used, final output of the system is not influenced if abnormity occurs in any one of the three phase-locked loops, immunity against single-particle transient state is high, and the immunity against single-particle transient state is higher than that of a manner that only sensitive nodes in the phase-locked loops are reinforced.

Description

technical field [0001] The invention relates to a clock generation circuit based on a phase-locked loop, in particular to a radiation-resistant hardened clock generation circuit with a triple-mode redundant structure. Background technique [0002] With the continuous shrinking of the feature size of integrated circuits, the single event transient (SET) effect caused by the impact of high-energy particles in the space radiation environment cannot be ignored. A stable high-speed system clock is the key to ensure the high-speed and stable operation of the system. The single-event transient (SET) effect can not only make the output clock signal of the phase-locked loop wrong, but the wrong clock will also cause data transmission errors and even paralyze the entire system. [0003] In view of the seriousness of the single event effect, it is very necessary to use a phase-locked loop with a radiation-hardened design to provide the system clock. According to the analysis of the si...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03L7/07H03K19/003
CPCH03L7/07H03K19/0033
Inventor 王亮韩旭鹏岳素格赵元富吕曼孙永姝
Owner BEIJING MXTRONICS CORP
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