Method and device for ip message fragment reassembly based on multi-core processor
A multi-core processor, IP packet technology, applied in the field of network communication, can solve the problem of BBU function confusion, reduce the performance of fragmentation and grouping, and achieve the effect of meeting design requirements, high performance requirements, and improving speed
Inactive Publication Date: 2019-09-06
POTEVIO INFORMATION TECH CO LTD
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Problems solved by technology
[0005] However, the above method sacrifices an important feature of the indoor baseband processing unit (BBU, Building Base band Unit): the order preservation of service packages, and without this order preservation, the BBU may cause functional confusion
Moreover, due to the need for secondary matching of IP address pairs after hashing, the performance of fragmented packets is partially reduced
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[0038] In order to make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are the present invention. Invented some embodiments, but not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative work shall fall within the protection scope of the present invention.
[0039] figure 2 Shows a flowchart of a method for fragmentation and reassembly of IP packets based on a multi-core processor according to an embodiment of the present invention; figure 2 As shown, the method includes:
[0040] S1: The first-level core performs a first-level hash lookup on the obtained IP packet fragments to be processed based on t...
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The present invention relates to a method and device for recombining IP message fragments based on a multi-core processor. The method includes: performing fragmentation of the acquired IP message to be processed according to an IP pair composed of a source IP and a destination IP and an ip verion. The first-level hash search is to obtain the entry corresponding to the IP pair in the first-level hash table, and obtain the starting pointer of the second-level hash table according to the entry; according to the IP id of the IP message fragmentation and The secondary hash table starting pointer is searched for a secondary hash to obtain matching IP message fragments in the secondary hash table; the matching IP message fragments are sent to the next level of thread or other CPU cores, so that the lower-level hard threads or other CPU cores package the matched IP packet fragments for subsequent processing. The present invention can greatly increase the rate of fragmented packets under the same processor conditions, realize the order preservation of service packets, improve the processing ability of IP fragmented messages, meet higher performance requirements, and meet higher integration of BBU products design requirements.
Description
Technical field [0001] The present invention relates to the technical field of network communication, in particular to a method and device for fragmentation and reorganization of IP packets based on a multi-core processor. Background technique [0002] Hard-threaded multi-core CPUs are widely used in embedded systems. The transmission performance of IP packet fragmentation grouping based on pure software protocol stack under vxWorks or Linux on multi-core CPU is very low: the speed of IP fragmentation grouping on a hard-threaded multi-core CPU is only about 80Mbps. In the packet core network PCN, the transmitted user payload (user data) will be encapsulated and removed by adding and removing GTP headers, respectively. eNodeB (Evolved Node B, evolved Node B) and the corresponding general data transfer platform (General Data Transfer Platform, GTP) between the serving gateway S-GW and between the S-GW and the public data network PDN gateway P-GW The tunnel needs to be established...
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IPC IPC(8): H04L12/805H04L12/861H04L12/863H04L47/36
CPCH04L47/36H04L47/622H04L47/6245H04L49/9036H04L49/9042H04L49/9057
Inventor 陈晓科李伟
Owner POTEVIO INFORMATION TECH CO LTD