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Multi-port access memory and working method thereof

A working method and multi-port technology, applied in the network field, can solve the problems of no buffering capability of ports, low arbitration efficiency, complex port protocols, etc., to achieve the effect of fast processing, meeting performance requirements, and improving overall efficiency

Active Publication Date: 2017-07-18
DATA COMM SCI & TECH RES INST +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] In view of the above-mentioned analysis, the present invention aims to provide a method for implementing multi-port memory access, in order to solve various problems such as complex port protocols, low arbitration efficiency, and no cache capability of ports when multiple modules in a processor access memory

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  • Multi-port access memory and working method thereof
  • Multi-port access memory and working method thereof

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Embodiment Construction

[0029] Preferred embodiments of the present invention will be specifically described below in conjunction with the accompanying drawings, wherein the accompanying drawings constitute a part of the application and are used together with the embodiments of the present invention to explain the principles of the present invention.

[0030] According to a specific embodiment of the present invention, a multi-port memory is disclosed, such as figure 1 As shown, including: two or more ports, finite state machine, time slice round-robin scheduling core, memory module; where,

[0031] One end of each port is coupled to the module that needs to access the data in the memory module. The module here refers to the business processing module. In a typical system design, there will be different business modules to complete different business functions, such as the central processing unit and Graphics processor, etc.;

[0032] The other end of each port is connected to the finite state machi...

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Abstract

The invention relates to a multi-port access memory and a working method thereof. The multi-port access memory comprises two or more than two ports, a finite state machine, a round-robin dispatching kernel and a memory module, wherein one end of each port is coupled to the module of data in the memory module, and the other end of each port is connected to the finite state machine; and the finite state machine is connected to the memory module through a bidirectional data line. By use of the multi-port access memory, a simple port data transmission protocol is adopted for providing certain buffer space for each port, arbitration logic is optimized, and the arbitration efficiency of a multi-port request is greatly improved; and when each module of the processor of communication gateway equipment accesses the memory, each port has the advantages of high equivalent read-write bandwidth, small delay and certain caching capacity to realize the quick processing of each module of the communication gateway processor for a high-speed data stream, improve the integral efficiency of the communication gateway equipment and meet the performance requirement of the communication network for the gateway equipment.

Description

technical field [0001] The invention relates to the field of network technology, in particular to a memory with multi-port access and a working method thereof. Background technique [0002] Multi-port access to memory is the main way for each module in the processor of the communication gateway to cache and exchange data. The access efficiency of different ports to memory determines the processing performance of the entire communication network. With the continuous development and evolution of the communication network, the network bandwidth continues to increase, and the requirements for the access efficiency of the memory port of the processor in the communication gateway device are also getting higher and higher. [0003] The core of the multi-port access memory is the request scheduling method for multi-port access. In the traditional multi-port access memory, each port is assigned an independent data and address bus, driven by logic and driven by the same clock, to acce...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/16
CPCG06F13/1605
Inventor 王建岗
Owner DATA COMM SCI & TECH RES INST
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