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Low-power-consumption successive approximation analog-to-digital converter

A successive approximation, analog-to-digital converter technology, applied in the direction of analog/digital conversion, code conversion, instruments, etc., to achieve the effect of reducing power consumption, reducing circuit power consumption, and avoiding power consumption

Active Publication Date: 2017-07-21
ZHEJIANG UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, there is a mutually restrictive relationship between these performance factors of the analog-to-digital converter, and it is usually necessary to make a trade-off according to the actual situation

Method used

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  • Low-power-consumption successive approximation analog-to-digital converter
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Embodiment Construction

[0027] In order to describe the present invention more specifically, the technical solutions of the present invention will be described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0028] Such as figure 1 As shown, the low-power successive approximation analog-to-digital converter of the present invention includes: a sample-and-hold module, a comparison module, a digital logic control unit, and two capacitor array modules; wherein: the sample-and-hold module is used for differential analog signals Sampling and holding to obtain two differential sampling signals; the capacitor array module is based on the corresponding differential sampling signal and the n-1 group switch control signals provided by the digital logic control unit (the switch control signal is composed of n-1 switch levels, which are used In order to determine the lower plate voltages of the other n-1 switch capacitors in the capacitor array module except the highest ...

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Abstract

The invention discloses a low-power-consumption successive approximation analog-to-digital converter, comprising a sampling and holding module, a capacitor array module, a comparison module and a digital logic control unit, wherein a clock signal generation part of the digital logic control unit adopts a clock signal locking module that consists of an inverter, a 3-input OR gate and a trigger D, and thus each time the switch is switched according to the output result of a comparator, only one switch in the switch array is switched, the other switches are locked and remain stationary, the unnecessary power consumption caused by false triggering of the switches can be avoided, and the power consumption of a digital-to-analog converter can be reduced.

Description

technical field [0001] The invention belongs to the technical field of analog-to-digital conversion, and in particular relates to a low-power successive approximation analog-to-digital converter. Background technique [0002] An analog-to-digital converter, or A / D converter, or ADC for short, usually refers to an electronic component that converts an analog signal into a digital signal. The application of digital electronic equipment is becoming more and more widespread, and it can be seen in almost all fields of all national economies. However, digital electronic equipment can only process digital signals, and the processed results are still digital quantities. In many occasions, the information to be processed is often a continuously changing quantity, such as temperature, pressure, speed, etc. The analog quantities of these non-electronic signals must first pass through The sensor becomes a voltage or current signal, which is then converted into a digital quantity before...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M1/00H03M1/38
CPCH03M1/002H03M1/38
Inventor 汤立汉赵梦恋杨小林董阳涛吴晓波
Owner ZHEJIANG UNIV
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