Method for keeping consistent phase of frequency division clock and frequency division circuit

A frequency division clock and frequency division circuit technology, applied in electrical components, counting chain pulse counters, pulse counters, etc., to achieve the effect of easy implementation, ensuring phase consistency, and ensuring correctness

Active Publication Date: 2017-07-25
SANECHIPS TECH CO LTD
View PDF6 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Since there is data interaction between these modules based on frequency-divided clocks, as the layout and wiring of the whole chip become larger and larger, the clocks of the two registers with data interaction are generated by two

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Method for keeping consistent phase of frequency division clock and frequency division circuit
  • Method for keeping consistent phase of frequency division clock and frequency division circuit
  • Method for keeping consistent phase of frequency division clock and frequency division circuit

Examples

Experimental program
Comparison scheme
Effect test

Example Embodiment

[0032] In order to understand the characteristics and technical contents of the embodiments of the present invention in more detail, the implementation of the embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings. The attached drawings are only for reference and description, and are not intended to limit the embodiments of the present invention.

[0033] With the continuous increase of the SOC design scale, many individually hardened (harden) modules appear in the chip design, called hardened modules. Some of the clock relationships of these hardened modules are relatively complex and diverse. The case of distributed clock frequency division. like figure 1 As shown, the Harden_module module is cured separately and is a cured module. The clock required by this module is also relatively complicated, and the top_wclk clock needs to be input from the top layer of the chip, and the module_div_wclk clock is generated by...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention discloses a method for keeping a consistent phase of a frequency division clock and a frequency division circuit. The method comprises the following steps: communicating a D input end of the last stage register of a first frequency divider with the D input end of the last stage register of a second frequency divider, wherein the first frequency divider is located at the outside of a curing module, and the second frequency divider is located in the curing module; performing frequency division on a source clock signal through the first frequency divider and the second frequency divider, outputting a first frequency division signal from a Q output end of the last stage register of the first frequency divider, and outputting a second frequency division signal from the Q output end of the last stage register of the second frequency divider, wherein the phase of the first frequency division signal is consistent with the phase of the second frequency division signal.

Description

technical field [0001] The invention relates to frequency division technology in the field of integrated circuits, in particular to a method and a frequency division circuit for keeping phases of frequency division clocks consistent. Background technique [0002] With the rapid development of consumer electronics, the functions of chips are becoming more and more complex, and the scale is also increasing. The modules integrated in the chip are also getting larger and more complex, such as processors and memory modules. In order to facilitate the comprehensive realization of the whole chip, these large modules are usually integrated into the full-chip netlist (netlist) in a separate hardening manner. [0003] In order to adapt to different application scenarios of the chip, some large modules in the chip often have a variety of clock sources, including high-frequency clocks for high performance and low-frequency clocks for low power consumption. Among them, these large modu...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
IPC IPC(8): H03K23/00
CPCH03K23/00
Inventor 孙华义
Owner SANECHIPS TECH CO LTD
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap