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Reconfigurable S box circuit structure applied to AES (Advanced Encryption Standard) and Camellia cryptographic algorithms

A cryptographic algorithm and circuit structure technology, applied in the field of reconfigurable S-box circuit structure, can solve the problems of large device volume, large cryptographic algorithm circuit area, light weight incompatible with electronic devices, etc., and achieve the effect of reducing circuit area and improving efficiency

Active Publication Date: 2017-07-28
WUHU INST OF TECH
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  • Abstract
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  • Application Information

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Problems solved by technology

[0048] In the prior art, the S-box operation in the AES cipher algorithm and the S-box operation in the Camellia cipher algorithm are implemented through two different circuits respectively, resulting in a large circuit area of ​​the overall cipher algorithm, thus making the encryption method The size of the device is large, which does not meet people's requirements for light, thin, short and small electronic devices

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  • Reconfigurable S box circuit structure applied to AES (Advanced Encryption Standard) and Camellia cryptographic algorithms
  • Reconfigurable S box circuit structure applied to AES (Advanced Encryption Standard) and Camellia cryptographic algorithms
  • Reconfigurable S box circuit structure applied to AES (Advanced Encryption Standard) and Camellia cryptographic algorithms

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Embodiment Construction

[0083] The specific implementation of the reconfigurable S-box circuit structure applied to the AES and Camellia encryption algorithms provided by the present invention will be described in detail below in conjunction with the accompanying drawings.

[0084] This specific embodiment provides a reconfigurable S-box circuit structure applied to AES and Camellia encryption algorithms. attached figure 1 It is a schematic structural diagram of a reconfigurable S-box circuit applied to AES and Camellia encryption algorithms according to a specific embodiment of the present invention.

[0085] like figure 1 As shown, the reconfigurable S-box circuit structure applied to the AES and Camellia encryption algorithms proposed in this specific embodiment includes: a composite matrix multiplication unit 1, a composite matrix multiplication unit 2, a constant addition unit 1, a constant addition unit 2, a constant addition unit Unit 3, constant addition unit 4, composite field multiplicati...

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Abstract

The invention provides a reconfigurable S box circuit structure applied to AES (Advanced Encryption Standard) and Camellia cryptographic algorithms. The reconfigurable S box circuit structure comprises a composite matrix multiplying unit 1, a composite matrix multiplying unit 2, a constant adding unit 1, a constant adding unit 2, a constant adding unit 3, a constant adding unit 4, a composite field multiplication inverse unit, a selector 1, a selector 2, a byte data input port, a byte data output port and a control signal input port; and both the selector 1 and the selector 2 are one-out-three selectors. According to the reconfigurable S box circuit structure provided by the invention, in a mode of multiplexing the composite field multiplication inverse unit, a reconfigurable function of an AES encryption S box operation, an AES decryption S box operation and a Camellia S box operation is achieved. Multiplexing of composite field multiplication inversion can greatly reduce the circuit area, and meanwhile, a composite matrix structure is beneficial to improvement of circuit optimization efficiency, so that the circuit area is further reduced.

Description

technical field [0001] The invention relates to the technical field of cryptographic circuits, in particular to a reconfigurable S-box circuit structure applied to AES and Camellia cryptographic algorithms. Background technique [0002] 1. AES cryptographic algorithm and Camellia cryptographic algorithm [0003] AES (Advanced Encryption Standard, Advanced Encryption Standard) is a new generation of block symmetric cipher algorithm formulated by the National Institute of Standards and Technology in 2001 to replace the original DES (Data Encryption Standard, Data Encryption Standard). The data packet length of the AES encryption algorithm is 128 bits, and there are three kinds of key lengths: 128, 192 and 256 bits. The AES encryption algorithm is adopted by many international standard organizations and is currently the most widely used block encryption algorithm. [0004] The Camellia algorithm was jointly designed by NTT and Mitsubishi in 2000. The data packet length of the...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04L9/06
CPCH04L9/0618H04L2209/12
Inventor 郑辛星张肖强邢博昱王倩
Owner WUHU INST OF TECH
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