Method and system for improving floating point matrix operation efficiency

A floating-point matrix, computing efficiency technology, applied in the field of improving the floating-point matrix computing efficiency, method and system, can solve the problems of multi-operation response time, high risk of explosion, and magnification of precision loss, so as to reduce the operation response time and ensure Operational accuracy and the effect of reducing accuracy loss

Inactive Publication Date: 2017-08-15
IFLYTEK CO LTD
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Problems solved by technology

[0003] The existing floating-point matrix fixed-point solution is to multiply the entire matrix by the same 2 n Scaling parameters, since the entire matrix uses the same scalar value n, when the distribution of floating-point values ​​in some rows is quite different, the response time and accuracy of the operation cannot be guaranteed at the same time, that is, after the fixed-point number is restored to a floating-point number, it will produce precision loss
For example, the value of one row of the matrix is ​​relatively small, and the value of the other row is relatively large. The two rows are (1.1, 1.2, 1.3) and (20, 30, 40) respectively. It needs to be multiplied by 3 at the same time, then all the numbers in the first line will be fixed-point and the result will be 3, the precision loss will be great, and the p

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  • Method and system for improving floating point matrix operation efficiency
  • Method and system for improving floating point matrix operation efficiency
  • Method and system for improving floating point matrix operation efficiency

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Embodiment Construction

[0066] In order to enable those skilled in the art to better understand the solutions of the embodiments of the present invention, the embodiments of the present invention will be further described in detail below in conjunction with the drawings and implementations.

[0067] First, the calculation principle of fixed-point conversion of floating-point matrix is ​​briefly explained.

[0068] It is assumed that 32-bit and above high-bit fixed-length vector registers in the SIMD (Single Instruction Multiple Data, Single Instruction Multiple Data) instruction set are used to optimize the floating-point matrix. Since float, short and char types occupy 32Bit, 16Bit and 8Bit respectively, a SIMD instruction can process 4 float types or 8 short types or 16 char type data on a 128-bit vector register. The processing speed of short-type data and char-type data is 2 times and 4 times that of float-type data respectively, so converting a float-type floating-point matrix into a short-type ...

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Abstract

The invention discloses a method and system for improving floating point matrix operation efficiency. The method comprises the following steps of: extracting sample matrixes in a floating point matrix operation to obtain a sample matrix sequence; determining an optimum calibration parameter sequence of the sample matrix sequence; and transforming calibration parameters in the optimum calibration parameter sequence and applying the transformed calibration parameter sequence into all the matrix sequence operations. By utilizing the method and system disclosed by the invention, the floating point matrix sequence operation response time can be shortened and the operation precision can be ensured.

Description

technical field [0001] The invention relates to the field of floating-point matrix operations, in particular to a method and system for improving the efficiency of floating-point matrix operations. Background technique [0002] In the fields of speech and image processing, it is often necessary to perform calculations on floating-point matrix sequences. For example, using neural network language models in speech recognition requires a large number of floating-point matrix sequences W that conform to certain distribution rules. m×n(1) , W m×n(2) ,...,W m×n(N) and x n×p(1) 、X n×p(2) ,...,X n×p(N) (m, n, p, and N are all positive integers) do multiplication operation, that is, W m×n(1) × R n×p(1) , W m×n(2) × R n×p(2) ,...,W m×n(N) × R n×p(N) , these areas require faster computing response time. If you directly operate on the floating-point matrix sequence, take the float (single-precision floating-point number) matrix as an example, since the float occupies 4 bytes,...

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Application Information

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IPC IPC(8): G06F17/16
Inventor 魏远明史鹏腾王敏
Owner IFLYTEK CO LTD
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