Method and device for erasure correction based on flash memory storage device

A flash memory storage and device technology, applied in the field of information processing, can solve the problems of high overhead of RAID series, weak error correction ability, large erasure delay, etc., to achieve strong protection ability, low erasure delay, and less resource consumption Effect

Active Publication Date: 2020-08-04
武汉中航通用科技有限公司
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  • Abstract
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  • Application Information

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Problems solved by technology

[0003] However, the RAID series either consumes a large amount of overhead, or the error correction capability is not strong.
The erasure code implemented by RS requires more resources to implement, and the erasure delay is very large, generally requiring hundreds of clock cycles.

Method used

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  • Method and device for erasure correction based on flash memory storage device
  • Method and device for erasure correction based on flash memory storage device

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Embodiment Construction

[0026] The present invention will be described in further detail below in conjunction with the accompanying drawings.

[0027] See figure 1 , Is a schematic diagram of the erasure correction device of the present invention. The device includes two parts: an encoding module and a decoding module. The encoding module processes 16 input data blocks to obtain two check data blocks. The decoding module uses the received two check data blocks to erase some of the received missing data. .

[0028] See figure 2 , Is a schematic diagram of the specific encoding process of the present invention.

[0029] The function of the coding part is to generate 2 check blocks (output) from no more than M=16 pieces of original data (input). In flash memory, each data block is 16KB, although other sizes are also possible.

[0030] Among them, the first data block is obtained by XORing the corresponding byte positions of the 16 original data blocks.

[0031] If the number of original data blocks is less th...

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PUM

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Abstract

The invention discloses an erasure correcting method and apparatus based on a flash memory storage device. The apparatus comprises an encoding module and a decoding module, the encoding module processes 16 input data blocks to obtain two verification data blocks, and the decoding module performs erasure correcting on received partially missing data by using the received two verification data blocks. The erasure correcting ability of the erasure correcting apparatus disclosed by the invention is M + 2, the protection ability of the erasure correcting apparatus is higher than that of the traditional RAID, few resources are occupied, meanwhile the erasure correcting delay is less than that of the traditional RS erasure code, the encoding only requires 2 clock cycles, and the decoding only requires 4 clock cycles. At the same time, breakpoint resume is supported, calculation can be performed without waiting for the preparation of all data blocks, and the data are calculated once arrival, therefore the requirements for the system cache are greatly reduced.

Description

Technical field [0001] The invention relates to the field of information processing, in particular to an erasure correction method and device based on flash memory storage equipment. Background technique [0002] Flash storage has a high read and write bandwidth and is a hot spot in the current storage field, but the characteristics of flash memory itself determine that its bit error rate is much higher than that of ordinary storage. In a flash memory storage unit at the bottom layer, ECC (error correction code technology) is generally used to ensure the accuracy of the data in the unit. At a higher level of the system, RAID or erasure codes are usually used to ensure the reliability of system storage. [0003] However, the RAID series either occupies a lot of overhead, or has poor error correction capabilities. However, the erasure code implemented by RS requires a lot of resources to implement, and the erasure delay is very large, which generally requires hundreds of clock cycl...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F11/10
CPCG06F11/1068
Inventor 杨珏成刘靖刘胜杰
Owner 武汉中航通用科技有限公司
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