Method for Measuring Length of Lightly Doped Drain Region in Array Substrate

A technology of lightly doped drain region and array substrate, applied in semiconductor/solid-state device testing/measurement, electrical components, circuits, etc. problems, to achieve the effect of improving stability and reliability

Active Publication Date: 2019-11-05
WUHAN CHINA STAR OPTOELECTRONICS TECH CO LTD
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Problems solved by technology

[0005] However, when producing LTPS array substrates, the existing production lines can only estimate the length of the LDD based on the length of the photoresist, but cannot perform the characterization and measurement of the actual product
like Figure 1a , Figure 1b ,and Figure 1c As shown, LDD is formed by doping polysilicon (poly-Si) with ions. After ion implantation into polysilicon, a small amount of diffusion will be carried out through the subsequent activation process. The actual length of LDD will have a certain deviation from the estimated value. Therefore, the existing method of estimating the length of the lightly doped drain region of the TFT in the LTPS array substrate cannot effectively monitor the LDD doping process.

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  • Method for Measuring Length of Lightly Doped Drain Region in Array Substrate
  • Method for Measuring Length of Lightly Doped Drain Region in Array Substrate
  • Method for Measuring Length of Lightly Doped Drain Region in Array Substrate

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Embodiment Construction

[0037] In order to further illustrate the technical means adopted by the present invention and its effects, the following describes in detail in conjunction with preferred embodiments of the present invention and accompanying drawings.

[0038] see figure 2 , the present invention provides a method for measuring the length of a lightly doped drain region in an array substrate, comprising the following steps:

[0039] Step S1, providing an array substrate.

[0040] The array substrate has a plurality of pixel areas arranged in an array, such as image 3 As shown, each pixel region at least includes a base substrate 1 , a buffer layer 11 covering the base substrate 1 , and a TFT 2 disposed on the base substrate 1 .

[0041] The TFT 2 includes an active layer 21 disposed on the buffer layer 11, a gate insulating layer 22 covering the active layer 21, a gate 23 disposed on the gate insulating layer 22, a covering gate 23 and a gate insulating layer. The interlayer insulating l...

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Abstract

The invention provides a method of measuring the length of a lightly doped drain (LDD) region in an array substrate. A strong alkaline solution is firstly used to corrode and exfoliate the source (251), the drain (252) of a TFT (Thin Film Transistor) (2) and the above film layer in a layer by layer mode; a strong acid solution is then used to corrode and exfoliate an interlayer insulation layer (24) and a gate insulation layer (22) which is not covered by a gate (23); and finally, an electron scanning microscope is used to photograph a down-looking image of the array substrate, and the length between the edge of the gate (23) and a boundary line between the lightly doped drain region (212) and a heavily doped region (213) on the down-looking image is measured, and the length is the actual length of the lightly doped drain region (212). The LDD doping process can be effectively monitored, and the stability and the reliability of products are enhanced.

Description

technical field [0001] The invention relates to the field of display device detection, in particular to a method for measuring the length of a lightly doped drain region in an array substrate. Background technique [0002] Thin Film Transistor (TFT) is the main driving element in current Liquid Crystal Display (LCD) and Active Matrix Organic Light-Emitting Diode (AMOLED). It is related to the display performance of the flat panel display device. [0003] Thin film transistors have various structures, and there are also various materials for preparing thin film transistors with corresponding structures. Low Temperature Polysilicon (LTPS) material is one of the more preferred materials. Due to the regular arrangement of atoms of low temperature polysilicon, the current carrying High sub-mobility. For voltage-driven LCDs, LTPS TFTs can use smaller TFTs to achieve deflection driving of liquid crystal molecules due to their high mobility, which greatly reduces the TFT occupation...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/66
CPCH01L22/12
Inventor 孟林
Owner WUHAN CHINA STAR OPTOELECTRONICS TECH CO LTD
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