Receiver loss of signal (referred as RXLOS) deglitch apparatus and method

Abstract

The invention discloses a RXLOS deglitch apparatus and method. The deglitch apparatus includes a sampler, a signal edge detecting unit and a finite state machine. The sampler receives a recovered clock, and samples a RXLOS signal according to the recovered clock. Consequently, a sampled RXLOS signal is generated. The signal edge detecting unit receives the RXLOS signal. When a logic level of the RXLOS signal is changed, an edge detection signal is activated by the edge detecting unit. The finite state machine receives the edge detection signal and the sampled RXLOS signal, generates an edge rest signal to control the edge detecting unit, and outputs a filtered RXLOS signal. According to the invention, the apparatus can receive a RXLOS Rx_los which is output by a front end circuit, removes a plurality of glitches on the RXLOS Rx_los, and outputs the filtered RXLOS Rx_los_f to a backend processor.

Description

technical field [0001] The present invention relates to a signal processing device and method, and in particular to a receiver loss of signal (receiver loss of signal, RXLOS signal) denoising device and method. Background technique [0002] In the application (SerDesapplication) of the serializer / deserializer (Serializer / Deserializer, SerDes for short), after the transmitter (Tx) converts the parallel data into serial data (convert parallel data to serial data), the differential signal (differential signal) D+, D- to pass serial data to the receiver (Rx). [0003] The front end circuit of the receiver (Rx) includes a data clock recovery circuit (Data Clock Recovery circuit), which can generate restored data according to the differential signals D+ and D- of the sending end (Tx) (recovered data) and restored clock (recovered clock). The rear end controller can sample the restored data according to the restored clock. [0004] In addition, the front-end circuit of the recei...

AI Technical Summary

Problems solved by technology

[0006] Basically, in the design of high-speed sequencer / deserializer (SerDes), the analog detection circuit in the receiver (Rx) cannot produce a stable receiver loss signal, so that many noises (glitch) appear in the receiver loss signal

When the back-end processor receives a receiver loss signal containing noise (glitch), it will cause a malfunction of the back-end processor, resulting in instability of the entire sequencer / deserializer (SerDes)

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