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A FPGA-based tcp/ip header verification device and method

A header and verification module technology, applied in the field of FPGA-based TCP/IP header verification device, to achieve the effect of ensuring correctness, easy implementation, and solving misjudgment

Active Publication Date: 2019-10-25
XIDIAN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0009] When the above situation occurs, although there is an error in the data, when the traditional method is used for TCP / IP header verification, the verification result is still correct, and a misjudgment occurs

Method used

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  • A FPGA-based tcp/ip header verification device and method
  • A FPGA-based tcp/ip header verification device and method

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Embodiment Construction

[0046] The present invention will be described in further detail below in conjunction with the accompanying drawings and embodiments.

[0047] refer to figure 1 , a FPGA-based TCP / IP header check device, comprising a data header storage module to be checked, a received data header check module, and a sent data header check module implemented in the FPGA, wherein:

[0048] The header storage module of the data to be verified is used to store the header information of the received TCP / IP data packet;

[0049] The received data header verification module is connected with the data header storage module to be verified, and is used for judging the level state of the verification signal, and reads the header information of the TCP / IP data packet when the verification signal is at a high level, and reads the header information of the TCP / IP data packet according to the binary level. The 16-bit double words are added sequentially to obtain the received basic checksum;

[0050] The s...

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Abstract

The invention provides an FPGA-based TCP / IP header verification device and method, and is used for solving the technical problems of data misjudgment in the verification and calculation method in the prior art. The verification device comprises six modules realized in the FPGA. An under verification data header storage module receives and stores TCP / IP data packet header information. A receiving data header verification module judges the level state of a verification signal and reads the TCP / IP data packet header information to perform receiving verification and calculation if the verification signal is in the high level. A transmitting data header verification module judges the level state of the verification signal and reads the TCP / IP data packet header information to perform transmitting verification and calculation if the verification signal is in the low level. A special data search and de-specialization processing module acquires a de-specialization factor and transmits the de-specialization factor. A receiving verification and integration module and a transmitting verification and integration module acquire and output receiving verification and transmitting verification by integrating the de-specialization factor.

Description

technical field [0001] The invention belongs to the technical field of network communication protocol data processing and data communication, and particularly relates to an FPGA-based TCP / IP header verification device and method, which can be used in a TCP / IP communication system to judge the correctness of a transmission data stream. Background technique [0002] In the TCP / IP network communication system, due to external interference such as temperature, radiation, communication distance, network environment, etc. when the data stream is transmitted on the line, the data stream received by the receiver is inconsistent with the data stream sent by the sender. Phenomenon. In order to avoid the adverse effects of the above phenomena on the communication quality, TCP / IP uses the header checksum in network communication to ensure the integrity and accuracy of data. [0003] The IP header checksum field is a checksum code calculated based on the IP header, and it does not calcu...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L1/00H04L29/06
CPCH04L1/0061H04L69/16H04L69/22
Inventor 王海刘岩李芙蓉杨敏张敏王立豪
Owner XIDIAN UNIV
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