Peak power probe hardware adjustment zero offset circuit and method

Abstract

The present invention provides a peak power probe hardware adjustment zero offset circuit. The circuit comprises two stages of differential amplifiers; the first-stage differential amplifier and peripheral resistors are matched with each other so as to constitute a differential adder; the forward input end of the first-stage differential amplifier is connected with a zero offset adjustment voltage and + signals inputted by a peak power probe; the reverse input end of the first-stage differential amplifier is connected with the reverse signal of the zero offset adjustment voltage and - signals inputted by the peak power probe; the second-stage differential amplifier and peripheral resistors are matched with each other so as to constitute a differential driving amplifier of an ADC; the gain of front-stage input signals is adjusted, and at the same time, the common-mode voltage of the input signals is increased, wherein the common-mode voltage is provided by the reference voltage of the ADC; and the zero offset adjustment voltage is set through a DAC, so that a difference-mode voltage outputted by the second-stage differential amplifier is a constant value when no signals are inputted into the peak power probe. The peak power probe hardware adjustment zero offset circuit of the invention has the advantages of higher zero adjustment voltage accuracy index, higher power accuracy index, low channel noises, high sensitivity index and simplicity.

Description

technical field [0001] The invention relates to the technical field of testing, in particular to a peak power probe hardware adjustment zero point offset circuit, and also relates to a peak power probe hardware adjustment zero point offset method. Background technique [0002] In peak power measurement, adjusting the zero offset is an important means to ensure the accuracy and sensitivity of power measurement. [0003] figure 1 A schematic diagram of a peak power sensor is shown, A1 is a detector consisting of a diode pair, and A2 is a logarithmic amplifier. In the case of no signal input, if the ambient temperature changes greatly, or the peak power probe is connected to different test equipment, the output IN+ and IN- of the probe will have a relatively large change due to the change of the noise floor, thus This results in relatively large changes in the ADC value sampled at the back end, and a relatively large change in the measured noise floor power, which affects the...

AI Technical Summary

Problems solved by technology

[0006] (1) Using a single-ended operational amplifier, the channel noise is high and the sensitivity is poor;

[0007] (2) Due to the low performance index of the high-speed ADC device at that time, it was necessary to use a high-digit low-speed ADC and a high-gain amplifier circuit to adjust the zero point offset, and the circuit was more complicated;

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