Unlock instant, AI-driven research and patent intelligence for your innovation.
Infrared led and its preparation method
What is Al technical title?
Al technical title is built by PatSnap Al team. It summarizes the technical point description of the patent document.
An infrared and epitaxial layer technology, applied in semiconductor devices, electrical components, circuits, etc., can solve problems such as large lattice mismatch, long process cycle, and high thermal budget
Active Publication Date: 2019-11-26
深圳市益光智能化有限公司
View PDF3 Cites 0 Cited by
Summary
Abstract
Description
Claims
Application Information
AI Technical Summary
This helps you quickly interpret patents by identifying the three key elements:
Problems solved by technology
Method used
Benefits of technology
Problems solved by technology
[0004] However, due to the large lattice mismatch (about 4%) between the Si substrate and the Ge epitaxial layer, the Ge epitaxial layer prepared by the conventional two-step process suffers from poor GeSi interface, high thermal budget, long process cycle, and Problems such as high dislocation density restrict the improvement of the performance of Ge infrared LED light-emitting devices
Method used
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more
Image
Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
Click on the blue label to locate the original text in one second.
Reading with bidirectional positioning of images and text.
Smart Image
Examples
Experimental program
Comparison scheme
Effect test
Embodiment 1
[0049] figure 1 It is a flowchart of a method for manufacturing an infrared LED provided by an embodiment of the present invention. The method comprises the steps of:
[0050] Step a, select Si substrate;
[0051] Step b, growing a Ge epitaxial layer on the surface of the Si substrate;
[0052] Step c, depositing a protective layer on the surface of the Ge epitaxial layer;
[0053] Step d, using LRC process to crystallize the Si substrate, the Ge epitaxial layer, and the protective layer;
[0054] Step e, etching the protective layer to form a crystallized Ge layer;
[0055] Step f, doping the crystallized Ge layer to form a P-type crystallized Ge layer;
[0056] Step g, continuously growing a Ge layer, an N-type Ge layer and an N-type Si layer on the surface of the P-type crystallized Ge layer;
[0057] Step h, making metal electrodes, and finally forming the infrared LED.
[0058] Wherein, step b may include:
[0059] Step b1, growing a Ge seed layer with a thickness o...
Embodiment 2
[0087] See image 3 , image 3 It is a schematic structural diagram of an infrared LED provided by an embodiment of the present invention. The structure includes:
[0088] Si substrate 01 , P-type crystallized Ge layer 02 , Ge layer 03 , N-type Ge layer 04 , N-type Si layer 05 and metalelectrode 06 ; wherein, the infrared LED is prepared by the above-mentioned embodiment.
Embodiment 3
[0090] See Figure 4a-Figure 4l It is a schematic diagram of an infrared LED process provided by an embodiment of the present invention. On the basis of the above embodiments, this embodiment will introduce the process flow of the present invention in more detail. The method includes:
[0091] S101, select single crystal Si substrate 001, such as Figure 4a shown;
[0092] S102. At a temperature of 275° C. to 325° C., a Ge seed layer 002 of 40 to 50 nm is grown on a single crystal Si substrate by using a CVD process, such as Figure 4b shown;
[0093] S103, at a temperature of 500° C. to 600° C., using a CVD process to grow a Ge main layer 003 of 150 to 250 nm on the surface of the first Ge seed layer, such as Figure 4c shown;
[0094] S104. Deposit SiO with a thickness of 100-150 nm on the surface of the Ge main body layer by CVD process 2 Layer 004, such as Figure 4d shown;
[0095] S105, including single crystal Si substrate 001, Ge seed layer 002, Ge main body l...
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More
PUM
Property
Measurement
Unit
thickness
aaaaa
aaaaa
Login to View More
Abstract
The invention relates to an infrared LED and a fabrication method thereof. The method comprises the steps of selecting a Si substrate; growing a Ge epitaxial layer on a surface of the Si substrate; depositing a protection layer on a surface of the Ge epitaxial layer; crystallizing the Si substrate, the Ge epitaxial layer and the protection layer by an LRC process; etching the protection layer to form a crystallized Ge layer; doping the crystallized Ge layer to form a P-type crystallization Ge layer; continuously growing the Ge layer, an N-type Ge layer and an N-type Si layer on the P-type crystallization Ge layer; and fabricating a metalelectrode, and finally, forming the infrared LED. With the adoption of the Laser Re-crystallization (LRC) process, the dislocation density, the surface roughness and the interface defect of a Ge virtual substrate can be effectively reduced, and the quality of the Ge virtual substrate is improved.
Description
technical field [0001] The invention relates to the technical field of integrated circuits, in particular to an infrared LED and a preparation method thereof. Background technique [0002] Semiconductor integrated circuits are the foundation of the electronics industry, and people's huge demand for the electronics industry has prompted the rapid development of this field. And has been following the development of Moore's law. With the gradual reduction of feature size, a series of problems such as transmission delay and bandwidth density have appeared in the electrical interconnection of integrated circuits. Therefore, optical interconnection has become a better choice for modern integrated circuits, and the conversion of electrical signals into optical signals by light-emitting tubes is one of the key components of optoelectronic integration. [0003] At present, semiconductor light sources mainly use III-V semiconductor materials, but their shortcomings such as high price...
Claims
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More
Application Information
Patent Timeline
Application Date:The date an application was filed.
Publication Date:The date a patent or application was officially published.
First Publication Date:The earliest publication date of a patent with the same application number.
Issue Date:Publication date of the patent grant document.
PCT Entry Date:The Entry date of PCT National Phase.
Estimated Expiry Date:The statutory expiry date of a patent right according to the Patent Law, and it is the longest term of protection that the patent right can achieve without the termination of the patent right due to other reasons(Term extension factor has been taken into account ).
Invalid Date:Actual expiry date is based on effective date or publication date of legal transaction data of invalid patent.
Login to View More