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Heterojunction resistive variable memory and its preparation method

A resistive memory, heterojunction technology, applied in electrical components and other directions, can solve problems such as difficulty in meeting high storage density, difficulty in practical application, increased energy consumption, etc., achieving easy preparation, stable memristive behavior, time saving and cost effect

Active Publication Date: 2020-09-08
XIDIAN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Although these resistive switching materials can have good resistive switching characteristics under a specific preparation process, the preparation process is relatively complicated, and the commonly used high-temperature treatment increases energy consumption and brings difficulties to practical applications.
These are difficult to meet the requirements of high storage density, high read and write speed, and low energy consumption non-volatile memory

Method used

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  • Heterojunction resistive variable memory and its preparation method
  • Heterojunction resistive variable memory and its preparation method
  • Heterojunction resistive variable memory and its preparation method

Examples

Experimental program
Comparison scheme
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Embodiment 1

[0041] See figure 1 , figure 1 It is a schematic diagram of a manufacturing method of a heterojunction resistive memory provided by an embodiment of the present invention. The method comprises the steps of:

[0042] Step a, preparing a semi-insulating substrate;

[0043] Step b, continuously growing an adhesion layer, a bottom electrode and Ga on the surface of the semi-insulating substrate 2 o 3 film;

[0044] Step c, using a spin coating process on the Ga 2 o 3 Growth of CH on the film surface 3 NH 3 PB 3 film;

[0045] Step d, in the CH 3 NH 3 PB 3 Dot-shaped top electrodes are grown on the surface of the film to form a heterojunction resistive variable memory.

[0046] Wherein, step a may include:

[0047] Growth of SiO on Si Substrate Surface by Thermal Oxidation Process 2 to prepare the semi-insulating substrate.

[0048] Further, after step a, it may also include:

[0049] The semi-insulating substrate was washed sequentially for 5 min with acetone sol...

Embodiment 2

[0067] See figure 2 , figure 2 It is a device schematic diagram of a heterojunction resistive memory provided by an embodiment of the present invention. The heterojunction resistive variable memory includes: a semi-insulating substrate 21, an adhesion layer 203, a bottom electrode 204, Ga 2 o 3 Film 205, CH 3 NH 3 PB 3 Thin film 206 and dot-like top electrode 207; Wherein, semi-insulating substrate 21 is made of Si substrate 201 and SiO produced by thermal oxidation on the surface of Si substrate 2 202, and the heterojunction resistive variable memory is prepared by the method described in the above embodiment.

[0068] Preferably, Ga 2 o 3 Thin film is N-type, CH 3 NH 3 PB 3 Thin film is P-type, N-type Ga 2 o 3 Thin films and P-type CH 3 NH 3 PB 3 The thin film forms a laminated PN heterojunction resistive layer.

[0069] The transistor of the present invention adopts CH 3 NH 3 PB 3 Provide a large number of electrons to the channel to form an n-type MO...

Embodiment 3

[0071] See Figure 3a ~ Figure 3f , Figure 3a ~ Figure 3f A process flow diagram of a heterojunction resistive memory provided by an embodiment of the present invention. This embodiment describes the technical solution of the present invention in detail on the basis of the above embodiments. Specifically, the method may include:

[0072] Step 1: Select a semi-insulating substrate.

[0073] Select Si substrate 301, and use thermal oxidation process to grow SiO on the surface of Si substrate 2 302 forms a semi-insulating substrate 31, SiO 2 The thickness of 302 is 80nm-120nm; the semi-insulating substrate 31 is cleaned to remove surface pollutants and natural oxide layer; the cleaning process is as follows: the semi-insulating substrate is placed in an acetone solution for ultrasonic cleaning for 5 minutes to remove surface pollutants, and then Ultrasonic cleaning with ethanol and deionized water for 5 min each, such as Figure 3a said;

[0074] Preferably, SiO 2 The ...

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Abstract

The invention relates to a heterojunction resistive variable memory and a preparation method thereof. The method comprises: preparing a semi-insulating substrate; successively growing an adhesion layer, a bottom electrode and Ga on the surface of the semi-insulating substrate. 2 o 3 thin film; Ga 2 o 3 Growth of CH on the film surface 3 NH 3 PB 3 film; in CH 3 NH 3 PB 3 Dot-shaped top electrodes are grown on the surface of the film to form a heterojunction resistive variable memory. In the present invention, since the resistance variable layer adopts a heterojunction, it is easy to modulate, and the memory and relaxation process of resistance is adjusted by factors such as the width of the depletion layer and the strength of the built-in electric field, which increases the flexibility of regulating the memristive performance; the selection of materials The memristive behavior is weak, and the memristive behavior is stable, which is helpful for the semi-quantitative research of memristive devices and lays the foundation for device design and further development.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to a heterojunction resistive variable memory and a preparation method thereof. Background technique [0002] Semiconductor integrated circuits are the foundation of the electronics industry, and people's huge demand for the electronics industry has prompted the rapid development of this field. In the past few decades, the rapid development of the electronics industry has had a huge impact on social development and national economy. With the development of integrated circuit technology, the integration and performance of microelectronic chips are constantly improving following Moore's law, and integrated circuit technology is constantly approaching its physical limit. With the continuous progress of the information age, the demand for information storage will increase. It has become larger and larger, and the traditional Flash memory has reached its limit. As the thickn...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L45/00
CPCH10N70/881H10N70/8833H10N70/011
Inventor 贾仁需董林鹏栾苏珍庞体强张玉明汪钰成刘银涛
Owner XIDIAN UNIV