ATE multiple-time-domain testing device
A test device and time-domain technology applied in the field of ATE multi-time-domain test devices to achieve the effect of saving memory and meeting the requirements of concurrent testing
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[0016] The specific embodiments of the present invention are given below in conjunction with the accompanying drawings, but the present invention is not limited to the following embodiments. Advantages and features of the present invention will be apparent from the following description and claims. It should be noted that all the drawings are in very simplified form and use imprecise ratios, which are only used for the purpose of conveniently and clearly assisting in describing the embodiments of the present invention.
[0017] Please refer to figure 2 , figure 2 Shown is a schematic structural diagram of an ATE multi-time-domain testing device in a preferred embodiment of the present invention. The present invention proposes a kind of ATE multi-time domain test device, comprising:
[0018] A system clock generator 100, configured to generate a system clock signal;
[0019] A plurality of test channels 200, each test channel 200 is respectively provided with an adjustabl...
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