Array substrate and method of manufacturing the same, and display panel

A technology for array substrates and substrates, which can be applied to electrical components, electrical solid-state devices, circuits, etc., and can solve problems such as uneven film layers.

Active Publication Date: 2018-02-16
BOE TECH GRP CO LTD
View PDF7 Cites 13 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] The invention provides an array substrate and its preparation method, and a display panel to solv

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Array substrate and method of manufacturing the same, and display panel
  • Array substrate and method of manufacturing the same, and display panel
  • Array substrate and method of manufacturing the same, and display panel

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0035] see figure 1 , which shows a structural block diagram of an array substrate according to Embodiment 1 of the present invention, specifically including:

[0036] The substrate 1 is then patterned to form an anode layer 5 and a first pixel defining layer 7 on the substrate 1, the light emitting layer 6 covering the anode layer 5, and the first pixel defining layer 7 formed on the first pixel defining layer 7 Two pixel defining layers 8, the second pixel defining layer 8 covers the edge region 9 of the light emitting layer.

[0037] In practical applications, the substrate 1 may be a substrate on which a thin film transistor array has been fabricated, or other substrates, which are not specifically limited in the present invention. The thin film transistor includes a source 2 , a drain 3 and a gate 4 .

[0038] The first pixel defining layer 7 has a regular trapezoidal structure, and the orthographic projection of the upper cross section of the first pixel defining layer ...

Embodiment 2

[0047] see figure 2 , which shows a structural block diagram of an array substrate described in Embodiment 2 of the present invention. The array substrate is basically the same as the array substrate described in Embodiment 1. For the same parts, you can refer to the content in Embodiment 1. This embodiment The second example mainly illustrates the differences from the first embodiment, which mainly lies in the different structures of the first pixel defining layer 7 and the second pixel defining layer 8 .

[0048] In the second embodiment, the first pixel defining layer has a tapered structure on the substrate. The tapered structure refers to the way in which the cross section of the first pixel defining layer decreases gradually on the substrate. The tapered structure specifically includes : the first pixel defining layer 7 adopts a structure with a narrow top and a wide bottom, that is, the first pixel defining layer 7 includes a first part close to the substrate and a sec...

Embodiment 3

[0052] see image 3 , which shows a structural block diagram of an array substrate described in Embodiment 3 of the present invention. The array substrate is basically the same as the array substrate described in Embodiment 1. For the same parts, you can refer to the content in Embodiment 1. The main differences are The difference is that the structures of the first pixel defining layer and the second pixel defining layer are different,

[0053] In the third embodiment, the first pixel defining layer has a tapered structure on the substrate. The tapered structure means that the cross-section of the first pixel defining layer decreases gradually on the substrate. The tapered structure specifically includes : what the first pixel defining layer 7 adopts is a ladder structure, and there are at least two steps or more steps in the ladder structure, the present invention does not specifically limit this, and the light emission can be reduced by setting the first pixel defining laye...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention provides an array substrate and a method of manufacturing the same. The array substrate comprises a substrate unit, an anode layer, a first pixel defining layer, a light-emitting layer covering the anode layer, and a second pixel defining layer formed on the first pixel defining layer, wherein the anode layer and the first pixel defining layer are formed on the substrate unit. The second pixel defining layer covers an edge region of the light-emitting layer. Therefore, a problem of a non-uniform film layer caused by a coffee ring effect is solved.

Description

technical field [0001] The present invention relates to the field of display technology, in particular to an array substrate, a preparation method thereof, and a display panel. Background technique [0002] In the field of display technology, existing methods for fabricating film layers in display devices mainly include inkjet printing, micro-transfer printing, spin coating, and the like. When the film layer is prepared by methods such as inkjet printing, when the film layer solution drops onto the pixel area, the liquid level near the pixel boundary layer will be slightly higher than the middle area, causing the thickness of the edge to be higher than the middle thickness, that is, coffee will appear. The ring effect, due to the existence of the "coffee ring" effect, will cause the film layer formed in the pixel area to appear thin in the middle and thick on both sides, that is, the film layer is uneven, so that the display brightness of the display device is uneven. Cont...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
IPC IPC(8): H01L27/32
CPCH10K59/122H10K59/1201H10K71/18H10K50/115H10K71/00
Inventor 张玉欣程鸿飞
Owner BOE TECH GRP CO LTD
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap