Microprocessor and execution method thereof
A microprocessor and processing core technology, applied in the direction of machine execution devices, data processing power supply, concurrent instruction execution, etc., can solve the problems of inability to provide speed, accuracy, system level transparency, etc., and achieve the effect of less power consumption
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[0045] The following is an introduction to the preferred embodiments of the present invention. Each embodiment is used to illustrate the principle of the present invention, but not to limit the present invention. The scope of the present invention should be determined by the claims.
[0046] Please refer to figure 1 , which is a block diagram showing a multi-core microprocessor 100 . The microprocessor 100 includes a plurality of processing cores, denoted as 102A, 102B to 102N, which are collectively referred to as a plurality of processing cores 102, or a plurality of cores 102 for short, and are individually referred to as a processing core 102 or a core 102 for short. More preferably, each core 102 includes a pipeline of one or more functional units (not shown) including an instruction cache, an instruction translation unit or an instruction decoder, more preferably including A microcode unit, scratch renaming unit, reservation station, cache memory, execution unit, memo...
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