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Small write optimizing method for log file system based on nonvolatile memory

A log file, non-volatile technology, applied in the direction of file system, file access structure, special data processing applications, etc., can solve the problems of limited performance improvement, reduce space allocation costs, ensure strong data consistency, and balance data Consistency overhead and performance effects

Active Publication Date: 2018-03-09
NAT UNIV OF DEFENSE TECH
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AI Technical Summary

Problems solved by technology

Due to block addressing and sequential reading and writing, traditional block devices are always limited in terms of performance improvement for small file reading and writing and small updates

Method used

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  • Small write optimizing method for log file system based on nonvolatile memory
  • Small write optimizing method for log file system based on nonvolatile memory

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Experimental program
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Embodiment Construction

[0018] refer to figure 1 , the invention provides a kind of lowercase optimization based on the log file system of non-volatile memory, comprising:

[0019] In the first step, the system parallels NVM and DRAM and directly connects it to the CPU memory bus. The CPU uses load and store to access NVM. Use the copy_from_user_nocache() interface to bypass the cache to ensure that the data to be written is persisted before the relevant metadata is modified;

[0020] In the second step, the system stores data and metadata in NVM in a linked list structure, and each inode uses a separate log to support concurrent access. The metadata index is stored in DRAM in the form of radix tree to support fast search. Data is allocated based on pages, and the default size of a data page is 4096 bytes (4KB);

[0021] In the third step, when there is an update operation on the data, first calculate the number of data pages involved in this update. When the update is larger than a data page siz...

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PUM

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Abstract

The invention relates to a performance optimizing method for a log file system based on a nonvolatile memory. The method comprises the following steps: connecting an NVM and a DRAM to a memory bus ofa CPU, updating small data by in-situ write so as to minimize occupation of the memory, carrying out fine-grained backup on the data to be updated by using a small data log, and recording the newest data information, which requires to be changed, of the file; storing a global hash table by a fixed-length circular buffer region, and recording an initial address of every update for rapid indexing tothe data page when in next in-situ updating; recording the initial address of the updated data page for next rapid indexing to the data page; and after data writing is finished, updating log tail byupdating a pointer, which points to a data block, of metadata to submit write at this time as a mark for completion of operation at this time. Expenditure and performance for data consistency can be balanced, space distribution costs are reduced, write amplification in a small data updating process is avoided, and meanwhile, powerful data consistency is ensured.

Description

technical field [0001] The invention relates to a performance optimization method of a log file system based on a non-volatile memory, in particular to an optimization method for writing performance in a small data update scenario. Background technique [0002] Several non-volatile memory technologies (non-volatile memory, NVM) are currently being researched and developed, including phase change memory (PCM), ferroelectric memory (FeRAM), memristors (Memristors), spin torque transfer memory ( STT-RAM) and 3D XPoint, etc. These NVMs have the advantages of large capacity, high integration, low leakage power consumption, fast access speed, non-volatility, and byte addressability. Since NVM has both the byte-addressable characteristics of DRAM and the persistence of disk, data can be persisted at the memory level in NVM. Persistent memory initially simulates block devices in the form of RAMDISK to be compatible with traditional file systems, so that it can benefit from memory-...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F17/30
CPCG06F16/13G06F16/152G06F16/1727G06F16/1815
Inventor 肖侬李阳刘芳
Owner NAT UNIV OF DEFENSE TECH
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