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Successive approximation type digital-analogue converter

A digital-to-analog converter, successive approximation technology, used in analog-to-digital conversion, code conversion, instruments, etc., can solve the problems of large capacitance area, increased power consumption, and inability to achieve high precision, and achieve zero-voltage switching. Power consumption, area reduction effect

Active Publication Date: 2018-03-23
XIDIAN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

At the same time, due to the relatively large area of ​​the capacitor array in the successive approximation analog-to-digital converter based on the traditional capacitor array, the accuracy of the traditional successive approximation analog-to-digital converter cannot be achieved very high, and the large capacitor area will cause an increase in power consumption

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  • Successive approximation type digital-analogue converter

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Embodiment 1

[0027] figure 1 A block diagram of a successive approximation digital-to-analog converter module provided for an embodiment of the present invention, including a first signal input terminal V ip , the second signal input terminal V in , a first capacitor array 1, a second capacitor array 2, a comparator 3, a logic chip 4, and an output latch 5;

[0028] The first capacitor array 1 is set at the first signal input terminal V ip and the non-inverting input terminal of the comparator 3, the second capacitor array 2 is set at the second signal input terminal V in and between the inverting input terminal of the comparator 3, the logic chip 4 is arranged between the output terminal of the comparator 3 and the output latch 5; the first signal input terminal V ip For inputting the first signal, the second signal input terminal V in for inputting a second signal; the comparator 3 is used for comparing the first signal with the second signal, and outputting the comparison result;

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Abstract

The invention discloses a successive approximation type digital-analogue converter comprising a first signal input terminal, a second signal input terminal, a first capacitor array, a second capacitorarray, a comparator, a logic chip and an output latch. The signal input terminal connected to the first capacitor array is used for inputting a first signal to the first capacitor array; the second signal input terminal connected to the second capacitor array is used for inputting a second signal to the second capacitor array; the first capacitor array is connected to a non-inverting input terminal of the comparator; the second capacitor array is connected with an inverted input terminal of the comparator; and the comparator with the output terminal connected with the logic chip and the output latch successively is used for comprising the first signal with the second signal and outputting a comparison result. A first switch is arranged between the first capacitor array and the second signal input terminal; and a second switch is arranged between the second capacitor array and the first signal input terminal. Compared with the traditional capacitor array, the successive approximation type digital-analogue converter enables the area to be reduced and zero voltage switching power consumption to be realized.

Description

technical field [0001] The invention belongs to the field of digital-to-analog conversion, and in particular relates to a successive approximation digital-to-analog converter. Background technique [0002] Successive approximation analog-to-digital converter (SAR, successive approximation register), in each conversion process, by traversing all quantized values ​​and converting them into analog values, comparing the input signal with it one by one, and finally obtaining the digital output Signal. With the promotion of wearable devices and the development of sophisticated biological instruments, successive approximation analog-to-digital converters have been widely used due to their simple structure and low power consumption. [0003] With the development of technology, the energy consumption of tube-level circuits is decreasing rapidly. In contrast, the main power consumption of SAR-ADC comes from the energy consumption in the process of sampling and switching of capacitor ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M1/46H03M1/00
CPCH03M1/002H03M1/466
Inventor 朱樟明刘健刘术彬丁瑞雪
Owner XIDIAN UNIV