Local jump instruction fetching circuit

A jump instruction and instruction technology, applied in the direction of concurrent instruction execution, electrical digital data processing, program control design, etc., can solve the problems of reducing the utilization rate of processor pipeline resources, low efficiency of branch instructions, etc., and improve the throughput of instruction processing , reduce invalid operations, and shorten the cycle

Active Publication Date: 2018-04-20
XIAN AVIATION COMPUTING TECH RES INST OF AVIATION IND CORP OF CHINA
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  • Abstract
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  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0002] In modern processor design, due to the existence of jump and branch instructions, and the branch prediction mechanism is not integrated, the processor is always in a waiting state from the beginning of processing jump and branch instructions to the retrieval and execution of subsequent valid instructions. It reduces the hardware complexity on the premise of ensuring the correct function, but the simplification and directness of this method lead to low efficiency of branch instruction execution, which makes more invalid operations inserted into the processor pipeline, reducing the processor pipeline. resource utilization of

Method used

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Embodiment Construction

[0018] The technical solutions of the present invention are clearly and completely described below in conjunction with the accompanying drawings and specific embodiments. Obviously, the described embodiments are only a part of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without making creative work are all Belong to the protection scope of the present invention.

[0019] see figure 1 , which is a schematic diagram of a partial jump instruction fetching circuit, and the present invention includes a PC update module, a sequential instruction buffer, a retirement instruction buffer and a PC stack.

[0020] The PC update module calculates the next instruction fetch PC according to the execution result of the double-issued instruction. If there is no jump instruction in the double-issued instruction, the PC will be incremented by 1 after executing the 8 inst...

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Abstract

The invention belongs to the technical field of computer hardware, and relates to a local jump instruction fetching circuit. The local jump instruction fetching circuit comprises a PC (Personal Computer) updating module, a sequential instruction relief area, a retirement instruction relief area and a PC stack, wherein the PC updating module is in charge of updating a PC address; the retirement instruction relief area stores 16 instructions which finish being executed; the sequential instruction relief area stores 8 instructions which are executed at present and 8 instructions to be executed; and the PC stack is used for realizing the saving and the recovery of the PC when a function is nested. By use of the circuit, according to the jump address of the jump instruction, the quick local jump of the instruction forwards in the retirement instruction relief area and backwards in the sequential instruction relief area can be realized so as to improve the execution efficiency of the jump instruction and the update efficiency of the relief area instruction, the waiting delay of an assembly line is lowered, and the execution efficiency of the processor is improved.

Description

technical field [0001] The invention relates to the technical field of computer hardware, in particular to a local jump instruction fetching circuit solution. Background technique [0002] In modern processor design, due to the existence of jump and branch instructions, and the branch prediction mechanism is not integrated, the processor is always in a waiting state from the beginning of processing jump and branch instructions to the retrieval and execution of subsequent valid instructions. It reduces the hardware complexity on the premise of ensuring the correct function, but the simplification and directness of this method lead to low efficiency of branch instruction execution, which makes more invalid operations inserted into the processor pipeline, reducing the processor pipeline. resource utilization. Contents of the invention [0003] The object of the present invention is to provide a partial jump instruction fetching circuit based on a retirement mechanism, and ad...

Claims

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Application Information

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IPC IPC(8): G06F9/30G06F9/38
CPCG06F9/30069G06F9/3804
Inventor 牛少平韩一鹏魏艳艳郝冲邓艺
Owner XIAN AVIATION COMPUTING TECH RES INST OF AVIATION IND CORP OF CHINA
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