The invention discloses a three-valued addition counter based on CNFETs. The three-valued addition counter comprises a pulse
signal generator, n addition counting units, and an n input
AND gate. The pulse
signal generator has an input end and output end. Each addition counting unit has an input end, an output end, a
clock control end, and a carry output end. The n input
AND gate has n input ends and an output end. The output end of the pulse
signal generator is connected with the
clock control ends of the n addition counting units. The carry output ends of the n addition counting units and the n input ends of the n input
AND gate are connected in one-to-one correspondence. The output end of the n input AND gate is the carry output end of the three-valued addition counter. The carry output end of the kth addition counting unit is connected with the input end of the (k+1)th addition counting unit, wherein k=1, 2, ..., n-1. The output end of the jth addition counting unit is the jth output end of the three-valued addition counter, wherein j=1, 2, ..., n. The three-valued addition counter reduces invalid operation, decreases circuit
power consumption and time
delay, and has a high-speed low-power-consumption characteristic.