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An anti-dpa attack method using clock disorder technology and chaotic trigger

A technology using clocks and flip-flops, applied in the field of anti-DPA attack, can solve the problems of increased production cost, increased circuit area or power consumption, etc., to achieve high security, weakened correlation, and weakened attack strength.

Active Publication Date: 2019-12-10
SOUTH CHINA UNIV OF TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

These circuits have made a great contribution to the method of resisting DPA attacks, but these methods also have certain defects, such as increasing the area or power consumption of the circuit, resulting in an increase in production costs

Method used

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  • An anti-dpa attack method using clock disorder technology and chaotic trigger
  • An anti-dpa attack method using clock disorder technology and chaotic trigger
  • An anti-dpa attack method using clock disorder technology and chaotic trigger

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Embodiment

[0025] This embodiment provides an anti-DPA attack method using clock out-of-sequence technology and chaotic triggers. The general schematic diagram of the method is as follows figure 1As shown, at the beginning of each encryption operation, an 8-bit random control signal is generated by the random control signal generation module, and one bit of the generated 8-bit random control signal is used when the chaos trigger module is in the reset state The control signal controls the chaotic unit inside the chaotic trigger module, and realizes the internal chaotic unit NAND output under the low level of the control signal, and the chaotic trigger is composed of NAND gates; the internal chaotic unit is realized under the high level of the control signal NOR output, the chaotic flip-flop is composed of NOR gates; thereby realizing the reconstruction of the chaotic flip-flop; when the chaotic flip-flop module is in the reset state, the two least significant bits of the 8-bit random cont...

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PUM

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Abstract

The invention discloses a DPA resisting method using a clock out-of-order technology and a chaos trigger, wherein basic module units used in the method comprise a random control signal generation module, a chaos trigger module and a clock out-of-order circuit module, the random control signal generation module comprises a register group for storing a plaintext and a time counter unit, in an initial period of encryption, a pseudorandom control signal is generated through operations to the register group and the time counter unit, the clock out-of-order circuit module generates three clock signals with phase deviation through a PLL and outputs the clock signals with phase deviation according to the control signal to drive the chaos trigger module, and the chaos trigger module forms a master-slave trigger circuit with a chaos unit with a setting-to-1 function and a chaos unit without the setting-to-1 function and completes reconstruction of the circuit under a reset state. The DPA resisting method using the clock out-of-order technology and the chaos trigger, provided by the invention, can make a chaos trigger group storing key data generate chaos at a time point when the data is operated in encryption operation of many times and realize controllable change of dynamic power consumption.

Description

technical field [0001] The invention relates to the fields of information security and digital integrated circuit design, in particular to an anti-DPA attack method using clock disorder technology and chaotic trigger. Background technique [0002] Information security plays an important role in electronic banking, finance, communications, military industry and other fields. As people rely more and more on these fields, the importance of information security cannot be ignored. In order to transmit information more securely and efficiently, engineers generally integrate some encryption algorithms inside the chip to encrypt key information. The encryption algorithms proposed in recent years include DES (Data Encryption Standard, Data Encryption Standard), AES (Advanced Encryption Standard, Advanced Encryption Standard), RSA, ECC (Elliptic Curves Cryptography, Elliptic Curve Cryptography) and HASH (Hash), etc. Encryption algorithms encrypt and protect information through compl...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L9/00H04L9/06
CPCH04L9/001H04L9/003H04L9/0618
Inventor 贺小勇吴镜聪荆朝霞
Owner SOUTH CHINA UNIV OF TECH
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